Searched refs:CONTROL_C (Results 1 - 4 of 4) sorted by relevance

/seL4-test-master/kernel/include/arch/arm/arch/64/mode/machine/
H A Dhardware.h17 #define CONTROL_C 2 /* Cacheability control, for data caching */ macro
/seL4-test-master/kernel/src/arch/arm/64/
H A Dhead.S34 #define CR_L1_DCACHE_SET BIT(CONTROL_C)
38 #define CR_L1_DCACHE_CLEAR BIT(CONTROL_C)
/seL4-test-master/kernel/include/arch/arm/arch/32/mode/machine/
H A Dhardware.h22 #define CONTROL_C 2 /* L1 data cache enable */ macro
/seL4-test-master/kernel/src/arch/arm/32/
H A Dhead.S34 #define CR_L1_DCACHE_SET BIT(CONTROL_C)
38 #define CR_L1_DCACHE_CLEAR BIT(CONTROL_C)

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