History log of /seL4-test-master/kernel/src/arch/arm/32/head.S
Revision Date Author Comments
# 79da0792 01-Mar-2020 Gerwin Klein <gerwin.klein@data61.csiro.au>

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.


# 6a31a57e 25-Nov-2018 Simon Shields <simon.shields@data61.csiro.au>

ARM: optionally pass bootloader DTB to userspace

We now support receiving a DTB from the ELF loader and passing it on
to userspace in extra bootinfo. We still support booting without a DTB,
though - the device tree address is set to zero in the boot code and no
extra bootinfo region is provided.


# ee28936d 18-Jun-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

SMP: Introduce ENABLE_SMP_SUPPORT

- Make it more readable and less confusing compared to the 'CONFIG_MAX_NUM_NODES > 1' check


# f1ef8b3a 01-Jun-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

ARM: Fix assembler error with BIT definition


# c1407c55 19-Feb-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

[SELFOUR-744]: Modify head.S to load stacks for each core and implement getCurrentCPUIndex


# d17615aa 15-Feb-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

ARM: use restore_user_context() in head.S


# 5d146463 18-Jan-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

ARM: Refactor how we get/set seL4 kernel stack

This commit makes seL4 hold the stack address on TPIDRPRW register (PL1 only
Thread ID Register, VMSA, see B4.1.150 section of ARMv7-A and ARMv7-R
edition reference manual).

Originally, the kernel stack was (re-)mapped to a fixed kernel virtual address and
on traps sp is loaded with this virtual address. Reason is to shave up some
cycles/instructions on (fast) traps path instead of having two instructions
(loading global variable pointer and then memory-load stack address from
it).

With ARM pipelining getting smart/complex (from ARMv7 onwards), there is
no noticeable difference in performance between the two implementations.
Furthermore, this change makes it easy for SMP to load different stacks
for each core and do CPU ID arithmetic efficiently. It also avoids the
issues involving (re-)mapping stacks for different cores if we
followed the original design.

Note: the main side-effect to this change is that the kernel stack for
ARM is no longer mapped with execute-never attribute.


# e9922b74 15-Jan-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

Unify kernel stack definition/declaration and share it between architecures/modes

Rather than defining a kernel stack in random places for each
architecure for each mode (32/64) and for single/SMP modes, make the
stack definition shareable between all of the above. This is also useful
for the future ARM SMP work.


# 88eef11c 12-Dec-2016 Frank <Frank.Li@data61.csiro.au>

Implemented prefetcher for arm: Hikey

Fixed typo


# 2d5a32f4 22-Nov-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

arm: Move initial setting of TPIDRURW register

This moves the setting of the TPIDRURW register for when we first
switch to the initial thread to happen both when ARM_HYPERVISOR_SUPPORT
is enabled and when it isn't


# e78cdf9b 27-Jul-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

SELFOUR-553: Support alternate IPC buffer locations without globals frame

This commit adds support for using the ThreadID registers of the ARM MPCore
platforms for storing the address of the IPC buffer instead of the globals
frame. The choice of using the user readable/writeable ThreadID register
is chosen, even though it means the user cannot use it for its own
purposes, as it leaves room in the future for doing TLS support in the
user read only register, where compilers expect it.


# 2a6a53fa 21-Sep-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

SELFOUR-664: Support for prefetcher on Cortex-A9

Add support for enabling the L1 and L2 prefetcher on cortex-A9.


# 5f0ae410 02-Jun-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

arm-hyp: Minor cleanups

Cleanup some small licensing, whitespace and configuration details


# 128768ed 31-May-2016 amrzar <azarrabi@nicta.com.au>

Add support for armV8 and Hikey 32bit


# 25d8153e 08-May-2016 Yanyan Shen <yanyan.shen@nicta.com.au>

arm_hyp/tk1: Fix GIC code. Expose Linux VM memory


# 86942825 15-Jan-2016 amrzar <azarrabi@nicta.com.au>

Rearranging sources for aarch32 to 32/*