1/*
2 * Copyright 2014, General Dynamics C4 Systems
3 *
4 * SPDX-License-Identifier: GPL-2.0-only
5 */
6
7#pragma once
8
9#include <config.h>
10#include <sel4/sel4_arch/constants.h>
11
12#define PAGE_BITS seL4_PageBits
13
14#define PPTR_VECTOR_TABLE 0xffff0000
15
16/* Processor ID used to check if errata work arounds need to be performed */
17#define ARM1136_R0PX 0x4107b360
18
19/* Control register fields */
20#define CONTROL_M   0  /* MMU enable */
21#define CONTROL_A   1  /* Alignment fault enable */
22#define CONTROL_C   2  /* L1 data cache enable */
23#define CONTROL_W   3  /* Write buffer enable */
24#define CONTROL_B   7  /* Big endian mode */
25#define CONTROL_S   8  /* System protection (deprecated) */
26#define CONTROL_R   9  /* ROM protection (deprecated) */
27#define CONTROL_Z   11 /* Flow prediction enable */
28#define CONTROL_I   12 /* L1 instruction cache enable */
29#define CONTROL_V   13 /* Exception vector remap */
30#define CONTROL_RR  14 /* Cache replacement strategy */
31#define CONTROL_FI  21 /* Fast Interrupt enable */
32#define CONTROL_U   22 /* Unaligned access enable */
33#define CONTROL_XP  23 /* Subpage AP bits disable */
34#define CONTROL_VE  24 /* Vectored interrupt enable */
35#define CONTROL_EE  25 /* Exception E bit */
36#define CONTROL_TRE 28 /* TEX remap enable */
37#define CONTROL_AP  29 /* Access Flag Enable */
38
39#ifdef CONFIG_PLAT_HIKEY
40/* Prefetcher register fields */
41#ifdef CONFIG_DEBUG_DISABLE_PREFETCHERS
42
43#define PREFETCHER         0x0
44#define PREFETCHER_MASK    0xE000
45
46#else /* CONFIG_DEBUG_DISABLE_PREFETCHERS */
47
48#define L1PCTL          (CONFIG_ARM_HIKEY_OUTSTANDING_PREFETCHERS << 13)      /* Number of outstanding prefetch streams */
49#define STRIDE          ((CONFIG_ARM_HIKEY_PREFETCHER_STRIDE-2) << 17)  /* Consecutive strides to trigger prefetch */
50#define NPFSTRM         ((CONFIG_ARM_HIKEY_PREFETCHER_NPFSTRM-1) << 19) /* Number of independent prefetch streams*/
51
52#ifndef CONFIG_ARM_HIKEY_PREFETCHER_STBPFDIS    /* Disable prefetch streams from STB access */
53#define STBPFDIS (1 << 22)
54#else
55#define STBPFDIS (0 << 22)
56#endif
57
58#ifdef CONFIG_ARM_HIKEY_PREFETCHER_STBPFRS      /* ReadUnique or ReadShared to initiate prefetch from STB access*/
59#define STBPFRS (1 << 23)
60#else
61#define STBPFRS (0 << 23)
62#endif
63
64#define PREFETCHER      (L1PCTL | \
65                        STRIDE | \
66                        NPFSTRM | \
67                        STBPFDIS| \
68                        STBPFRS)
69#define PREFETCHER_MASK 0xDAE000       /* Mask bits */
70#endif /* CONFIG_DEBUG_DISABLE_PREFETCHERS */
71#endif /* CONFIG_PLAT_HIKEY */
72
73/* Processor mode encodings (for CPS etc.) */
74#define PMODE_USER       0x10
75#define PMODE_FIQ        0x11
76#define PMODE_IRQ        0x12
77#define PMODE_SUPERVISOR 0x13
78#define PMODE_ABORT      0x17
79#define PMODE_HYPERVISOR 0x1a
80#define PMODE_UNDEFINED  0x1b
81#define PMODE_SYSTEM     0x1f
82/* Processor exception mask bits */
83#define PMASK_ASYNC_ABORT (1 << 8)
84#define PMASK_IRQ         (1 << 7)
85#define PMASK_FIRQ        (1 << 6)
86
87/* Kernel operating mode */
88#ifdef CONFIG_ARM_HYPERVISOR_SUPPORT
89#define PMODE_KERNEL     PMODE_HYPERVISOR
90#define PMODE_IDLE       PMODE_HYPERVISOR
91#else
92#define PMODE_KERNEL     PMODE_SUPERVISOR
93#define PMODE_IDLE       PMODE_SYSTEM
94#endif
95
96#ifndef __ASSEMBLER__
97
98#include <arch/types.h>
99
100enum vm_page_size {
101    ARMSmallPage,
102    ARMLargePage,
103    ARMSection,
104    ARMSuperSection
105};
106typedef word_t vm_page_size_t;
107
108enum frameSizeConstants {
109    ARMSmallPageBits    = seL4_PageBits,
110    ARMLargePageBits    = seL4_LargePageBits,
111    ARMSectionBits      = seL4_SectionBits,
112    ARMSuperSectionBits = seL4_SuperSectionBits
113};
114
115static inline word_t CONST pageBitsForSize(vm_page_size_t pagesize)
116{
117    switch (pagesize) {
118    case ARMSmallPage:
119        return ARMSmallPageBits;
120
121    case ARMLargePage:
122        return ARMLargePageBits;
123
124    case ARMSection:
125        return ARMSectionBits;
126
127    case ARMSuperSection:
128        return ARMSuperSectionBits;
129
130    default:
131        fail("Invalid page size");
132    }
133}
134
135#endif /* __ASSEMBLER__ */
136
137