Searched refs:con0 (Results 1 - 6 of 6) sorted by relevance

/seL4-refos-master/libs/libplatsupport/src/mach/exynos/
H A Dclock.c94 uint32_t con0, con1; local
120 /* updating involved bits in con0 and con1 regs */
121 con0 = pll_regs->con0 & ~PLL_MPS_MASK;
126 pll_regs->con0 = (con0 | mps | PLL_ENABLE);
127 while (!(pll_regs->con0 & PLL_LOCKED));
H A Dclock.h67 uint32_t con0; member in struct:pll_regs
/seL4-refos-master/projects/util_libs/libplatsupport/src/mach/exynos/
H A Dclock.c94 uint32_t con0, con1; local
120 /* updating involved bits in con0 and con1 regs */
121 con0 = pll_regs->con0 & ~PLL_MPS_MASK;
126 pll_regs->con0 = (con0 | mps | PLL_ENABLE);
127 while (!(pll_regs->con0 & PLL_LOCKED));
H A Dclock.h67 uint32_t con0; member in struct:pll_regs
/seL4-refos-master/libs/libplatsupport/src/mach/exynos/clock/
H A Dexynos_common_clock.c32 v = pll_regs->con0 & PLL_MPS_MASK;
/seL4-refos-master/projects/util_libs/libplatsupport/src/mach/exynos/clock/
H A Dexynos_common_clock.c32 v = pll_regs->con0 & PLL_MPS_MASK;

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