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a0359d73 |
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03-Dec-2018 |
Adam Felizzi <Adam.Felizzi@data61.csiro.au> |
platsupport: Refactored exynos pll_get_freq Updated the implementation of _pll_get_freq. This differs based on the exynos SoC, Exynos5422 in particular. The implemenation of get_freq has been moved out into different source files. These source files are conditionally compiled in depending on the target SoC.
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aff6136b |
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03-Dec-2018 |
Adam Felizzi <Adam.Felizzi@data61.csiro.au> |
platsupport: Moved exynos clock defs into header Moved PLL and DIV definitions into internal clock header. This change has no effect other than tidying up the clock clode.
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ce2b7457 |
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25-Nov-2018 |
Adam Felizzi <Adam.Felizzi@data61.csiro.au> |
platsupport: Updated clock settings on exynos5422 The clock controller on the exynos5422 has a different configuration compared to previous exynos54XX platforms the library currently supports. In particilar the PLL CMUs have been updated according to the exynos5422 specification. This allows enables the user to properly set and get PLL frequency values.
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398af6af |
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13-Jul-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
Fix whitespace - remove trailing whitespace - remove duplicate blank lines - remove blank lines at end of file
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a7130f9f |
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04-Jun-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
fix licenses
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03ede780 |
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23-Aug-2016 |
Kent McLeod <kent.mcleod@nicta.com.au> |
Remove trailing whitespace
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