Searched refs:SB_RAM0_DWLEN (Results 1 - 16 of 16) sorted by relevance

/openwrt/package/kernel/lantiq/ltq-atm/src/
H A Difxmips_atm_ar9.c157 for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN + SB_RAM4_DWLEN; i++ )
H A Difxmips_atm_ppe_amazon_se.h66 #define SB_RAM0_DWLEN 0x0A00 macro
H A Difxmips_atm_vr9.c142 for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN; i++ )
H A Difxmips_atm_amazon_se.c216 for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN; i++ )
H A Difxmips_atm_danube.c190 for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN; i++ )
H A Difxmips_atm_ppe_danube.h68 #define SB_RAM0_DWLEN 0x0400 macro
H A Difxmips_atm_ppe_vr9.h54 #define SB_RAM0_DWLEN 0x1000 macro
H A Difxmips_atm_ppe_ar9.h69 #define SB_RAM0_DWLEN 0x0800 macro
/openwrt/package/kernel/lantiq/ltq-ptm/src/
H A Difxmips_ptm_amazon_se.c206 for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN; i++ )
H A Difxmips_ptm_danube.c201 for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN; i++ )
H A Difxmips_ptm_ppe_danube.h66 #define SB_RAM0_DWLEN 0x0400 macro
H A Difxmips_ptm_vr9.c168 for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN; i++ )
H A Difxmips_ptm_ar9.c229 for ( i = 0; i < SB_RAM0_DWLEN + SB_RAM1_DWLEN + SB_RAM2_DWLEN + SB_RAM3_DWLEN + SB_RAM4_DWLEN; i++ )
H A Difxmips_ptm_ppe_amazon_se.h64 #define SB_RAM0_DWLEN 0x0A00 macro
H A Difxmips_ptm_ppe_ar9.h67 #define SB_RAM0_DWLEN 0x0800 macro
H A Difxmips_ptm_ppe_vr9.h52 #define SB_RAM0_DWLEN 0x1000 macro

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