Searched refs:PPE_MAILBOX_IGU1_INT (Results 1 - 11 of 11) sorted by relevance

/openwrt/package/kernel/lantiq/ltq-atm/src/
H A Difxmips_atm_ppe_amazon_se.h117 #define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL13 macro
H A Difxmips_atm_ppe_danube.h125 #define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL24 macro
H A Dltq_atm.c438 enable_irq(PPE_MAILBOX_IGU1_INT);
481 disable_irq(PPE_MAILBOX_IGU1_INT);
1060 enable_irq(PPE_MAILBOX_IGU1_INT);
1068 disable_irq_nosync(PPE_MAILBOX_IGU1_INT);
1845 ret = request_irq(PPE_MAILBOX_IGU1_INT, mailbox_irq_handler, 0, "atm_mailbox_isr", &g_atm_priv_data);
1847 ret = request_irq(PPE_MAILBOX_IGU1_INT, mailbox_irq_handler, IRQF_DISABLED, "atm_mailbox_isr", &g_atm_priv_data);
1853 pr_err("request_irq fail irq:%d\n", PPE_MAILBOX_IGU1_INT);
1857 disable_irq(PPE_MAILBOX_IGU1_INT);
1891 free_irq(PPE_MAILBOX_IGU1_INT, &g_atm_priv_data);
1914 free_irq(PPE_MAILBOX_IGU1_INT,
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H A Difxmips_atm_ppe_vr9.h188 #define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL24 macro
H A Difxmips_atm_ppe_ar9.h184 #define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL24 macro
/openwrt/package/kernel/lantiq/ltq-ptm/src/
H A Difxmips_ptm_ppe_danube.h131 #define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL24 macro
H A Difxmips_ptm_vdsl.c981 ret = request_irq(PPE_MAILBOX_IGU1_INT, mailbox_irq_handler, 0, "ptm_mailbox_isr", &g_ptm_priv_data);
983 ret = request_irq(PPE_MAILBOX_IGU1_INT, mailbox_irq_handler, IRQF_DISABLED, "ptm_mailbox_isr", &g_ptm_priv_data);
994 disable_irq(PPE_MAILBOX_IGU1_INT);
1004 enable_irq(PPE_MAILBOX_IGU1_INT);
1019 free_irq(PPE_MAILBOX_IGU1_INT, &g_ptm_priv_data);
1047 free_irq(PPE_MAILBOX_IGU1_INT, &g_ptm_priv_data);
H A Difxmips_ptm_adsl.c1473 ret = request_irq(PPE_MAILBOX_IGU1_INT, mailbox_irq_handler, 0, "ptm_mailbox_isr", &g_ptm_priv_data);
1475 ret = request_irq(PPE_MAILBOX_IGU1_INT, mailbox_irq_handler, IRQF_DISABLED, "ptm_mailbox_isr", &g_ptm_priv_data);
1486 disable_irq(PPE_MAILBOX_IGU1_INT);
1496 enable_irq(PPE_MAILBOX_IGU1_INT);
1515 free_irq(PPE_MAILBOX_IGU1_INT, &g_ptm_priv_data);
1553 free_irq(PPE_MAILBOX_IGU1_INT, &g_ptm_priv_data);
H A Difxmips_ptm_ppe_amazon_se.h182 #define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL13 macro
H A Difxmips_ptm_ppe_ar9.h209 #define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL24 macro
H A Difxmips_ptm_ppe_vr9.h201 #define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL24 macro

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