Searched refs:MBOX_IGU1_ISRC (Results 1 - 13 of 13) sorted by relevance
| /openwrt/package/kernel/lantiq/ltq-atm/src/ |
| H A D | ifxmips_atm_ar9.c | 146 IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
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| H A D | ifxmips_atm_vr9.c | 131 IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
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| H A D | ifxmips_atm_amazon_se.c | 182 IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
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| H A D | ifxmips_atm_danube.c | 164 IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
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| H A D | ifxmips_atm_ppe_common.h | 210 #define MBOX_IGU1_ISRC PPE_REG_ADDR(0x0205) macro
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| H A D | ltq_atm.c | 435 *MBOX_IGU1_ISRC = (1 << RX_DMA_CH_AAL) | (1 << RX_DMA_CH_OAM);
1053 *MBOX_IGU1_ISRC = *MBOX_IGU1_ISR;
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| /openwrt/package/kernel/lantiq/ltq-ptm/src/ |
| H A D | ifxmips_ptm_amazon_se.c | 172 IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
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| H A D | ifxmips_ptm_danube.c | 167 IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
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| H A D | ifxmips_ptm_vr9.c | 122 IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
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| H A D | ifxmips_ptm_vdsl.c | 260 IFX_REG_W32_MASK(0, 1, MBOX_IGU1_ISRC);
294 IFX_REG_W32_MASK(0, 1 << 17, MBOX_IGU1_ISRC);
547 IFX_REG_W32(isr, MBOX_IGU1_ISRC);
605 IFX_REG_W32_MASK(0, 16, MBOX_IGU1_ISRC);
1002 IFX_REG_W32(~0, MBOX_IGU1_ISRC);
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| H A D | ifxmips_ptm_ar9.c | 156 IFX_REG_W32(0xFFFFFFFF, MBOX_IGU1_ISRC);
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| H A D | ifxmips_ptm_ppe_common.h | 208 #define MBOX_IGU1_ISRC PPE_REG_ADDR(0x0205) macro
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| H A D | ifxmips_ptm_adsl.c | 376 IFX_REG_W32_MASK(0, 1 << ndev, MBOX_IGU1_ISRC);
410 IFX_REG_W32_MASK(0, 1 << (ndev + 16), MBOX_IGU1_ISRC);
676 IFX_REG_W32(isr, MBOX_IGU1_ISRC);
744 IFX_REG_W32_MASK(0, 1 << arg, MBOX_IGU1_ISRC);
1494 IFX_REG_W32(~0, MBOX_IGU1_ISRC);
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