Searched refs:ixAZF0ENDPOINT1_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 (Results 1 - 15 of 15) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h6103 #define ixAZF0ENDPOINT1_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 0x003c macro
H A Ddcn_3_0_3_offset.h7726 #define ixAZF0ENDPOINT1_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 0x003c macro
H A Ddcn_1_0_offset.h13413 #define ixAZF0ENDPOINT1_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 macro
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H A Ddcn_2_1_0_offset.h13173 #define ixAZF0ENDPOINT1_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 macro
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H A Ddcn_3_0_1_offset.h12569 #define ixAZF0ENDPOINT1_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 macro
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H A Ddcn_3_2_0_offset.h13880 #define ixAZF0ENDPOINT1_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 macro
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H A Ddcn_3_2_1_offset.h13859 #define ixAZF0ENDPOINT1_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 macro
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H A Ddcn_2_0_0_offset.h16837 #define ixAZF0ENDPOINT1_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 macro
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H A Ddcn_3_1_6_offset.h14980 #define ixAZF0ENDPOINT1_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 macro
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H A Ddcn_3_1_4_offset.h484 #define ixAZF0ENDPOINT1_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 0x003c macro
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H A Ddcn_3_1_5_offset.h14489 #define ixAZF0ENDPOINT1_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 macro
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H A Ddcn_3_1_2_offset.h14383 #define ixAZF0ENDPOINT1_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 macro
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H A Ddcn_3_0_0_offset.h17185 #define ixAZF0ENDPOINT1_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 macro
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H A Ddcn_3_0_2_offset.h15462 #define ixAZF0ENDPOINT1_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 macro
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/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h17226 #define ixAZF0ENDPOINT1_AZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 macro
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