Searched refs:isSubClassOf (Results 1 - 25 of 40) sorted by relevance

12

/openbsd-current/gnu/llvm/llvm/utils/TableGen/
H A DPredicateExpander.cpp64 assert(Reg->isSubClassOf("Register") && "Expected a register Record!");
283 if (Rec->isSubClassOf("MCOpcodeSwitchStatement")) {
289 if (Rec->isSubClassOf("MCReturnStatement")) {
299 if (Rec->isSubClassOf("MCTrue")) {
305 if (Rec->isSubClassOf("MCFalse")) {
311 if (Rec->isSubClassOf("CheckNot")) {
318 if (Rec->isSubClassOf("CheckIsRegOperand"))
321 if (Rec->isSubClassOf("CheckIsImmOperand"))
324 if (Rec->isSubClassOf("CheckRegOperand"))
329 if (Rec->isSubClassOf("CheckRegOperandSimpl
[all...]
H A DCallingConvEmitter.cpp124 if (Action->isSubClassOf("CCPredicateAction")) {
127 if (Action->isSubClassOf("CCIfType")) {
135 } else if (Action->isSubClassOf("CCIf")) {
146 if (Action->isSubClassOf("CCDelegateTo")) {
152 } else if (Action->isSubClassOf("CCAssignToReg") ||
153 Action->isSubClassOf("CCAssignToRegAndStack")) {
182 if (Action->isSubClassOf("CCAssignToRegAndStack")) {
206 } else if (Action->isSubClassOf("CCAssignToRegWithShadow")) {
246 } else if (Action->isSubClassOf("CCAssignToStack")) {
271 } else if (Action->isSubClassOf("CCAssignToStackWithShado
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H A DInfoByHwMode.cpp41 if (R->isSubClassOf("PtrValueType"))
108 if (!Rec->isSubClassOf("ValueType"))
111 assert(Rec->isSubClassOf("ValueType") &&
113 if (Rec->isSubClassOf("HwModeSelect"))
129 bool RegSizeInfo::isSubClassOf(const RegSizeInfo &I) const { function in class:RegSizeInfo
160 bool RegSizeInfoByHwMode::isSubClassOf(const RegSizeInfoByHwMode &I) const { function in class:RegSizeInfoByHwMode
162 return get(M0).isSubClassOf(I.get(M0));
191 assert(P.second && P.second->isSubClassOf("InstructionEncoding") &&
H A DCodeGenInstruction.cpp86 if (Rec->isSubClassOf("RegisterOperand")) {
91 } else if (Rec->isSubClassOf("Operand")) {
111 if (Rec->isSubClassOf("PredicateOp"))
113 else if (Rec->isSubClassOf("OptionalDefOperand"))
120 } else if (Rec->isSubClassOf("RegisterClass")) {
122 } else if (!Rec->isSubClassOf("PointerLikeRegClass") &&
123 !Rec->isSubClassOf("unknown_class")) {
526 assert(FirstImplicitDef->isSubClassOf("Register"));
592 return Constraint->getDef()->isSubClassOf("TypedOperand") &&
625 if (InstOpRec->isSubClassOf("RegisterOperan
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H A DDAGISelMatcherGen.cpp235 if (LeafRec->isSubClassOf("ValueType")) {
244 LeafRec->isSubClassOf("RegisterClass") ||
245 LeafRec->isSubClassOf("RegisterOperand") ||
246 LeafRec->isSubClassOf("PointerLikeRegClass") ||
247 LeafRec->isSubClassOf("SubRegIndex") ||
254 if (LeafRec->isSubClassOf("Register")) {
261 if (LeafRec->isSubClassOf("CondCode"))
264 if (LeafRec->isSubClassOf("ComplexPattern")) {
315 if (N->getOperator()->isSubClassOf("ComplexPattern")) {
685 if (Def->isSubClassOf("Registe
[all...]
H A DCodeGenTarget.cpp738 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
740 if (TyEl->isSubClassOf("LLVMMatchType"))
755 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
757 if (TyEl->isSubClassOf("LLVMMatchType")) {
765 assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
766 !TyEl->isSubClassOf("LLVMTruncatedType")) ||
786 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
788 if (TyEl->isSubClassOf("LLVMMatchType")) {
801 assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
802 !TyEl->isSubClassOf("LLVMTruncatedTyp
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H A DCodeGenDAGPatterns.cpp1504 if (!Def->isSubClassOf("Predicate")) {
1552 if (R->isSubClassOf("SDTCisVT")) {
1558 } else if (R->isSubClassOf("SDTCisPtrTy")) {
1560 } else if (R->isSubClassOf("SDTCisInt")) {
1562 } else if (R->isSubClassOf("SDTCisFP")) {
1564 } else if (R->isSubClassOf("SDTCisVec")) {
1566 } else if (R->isSubClassOf("SDTCisSameAs")) {
1569 } else if (R->isSubClassOf("SDTCisVTSmallerThanOp")) {
1573 } else if (R->isSubClassOf("SDTCisOpSmallerThanOp")) {
1577 } else if (R->isSubClassOf("SDTCisEltOfVe
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H A DIntrinsicEmitter.cpp312 if (R->isSubClassOf("LLVMMatchType")) {
315 if (R->isSubClassOf("LLVMExtendedType"))
317 else if (R->isSubClassOf("LLVMTruncatedType"))
319 else if (R->isSubClassOf("LLVMHalfElementsVectorType"))
321 else if (R->isSubClassOf("LLVMScalarOrSameVectorWidth")) {
328 else if (R->isSubClassOf("LLVMPointerTo"))
330 else if (R->isSubClassOf("LLVMVectorOfAnyPointersToElt")) {
337 } else if (R->isSubClassOf("LLVMAnyPointerToElt")) {
344 } else if (R->isSubClassOf("LLVMPointerToElt"))
346 else if (R->isSubClassOf("LLVMVectorElementTyp
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H A DX86MnemonicTables.cpp48 if (!Def->isSubClassOf("X86Inst"))
H A DCompressInstEmitter.cpp151 assert(Reg->isSubClassOf("Register") && "Reg record should be a Register");
152 assert(RegClass->isSubClassOf("RegisterClass") &&
169 if (DagOpType->isSubClassOf("RegisterClass") &&
170 InstOpType->isSubClassOf("RegisterClass")) {
177 if (DagOpType->isSubClassOf("RegisterClass") ||
178 InstOpType->isSubClassOf("RegisterClass"))
218 if (DI->getDef()->isSubClassOf("Register")) {
246 if (Inst.Operands[i].Rec->isSubClassOf("RegisterClass"))
507 !cast<DefInit>(Arg)->getDef()->isSubClassOf("SubtargetFeature"))
714 if (Source.Operands[OpNo].Rec->isSubClassOf("RegisterClas
[all...]
H A DDAGISelEmitter.cpp48 if (Op->isSubClassOf("Instruction")) {
67 if (Op->isSubClassOf("Instruction")) {
H A DCodeGenSchedule.cpp480 if (Queue->isSubClassOf("LoadQueue")) {
491 if (Queue->isSubClassOf("StoreQueue")) {
555 if (ModelKey->isSubClassOf("SchedMachineModel")) {
576 if (RWDef->isSubClassOf("WriteSequence")) {
581 else if (RWDef->isSubClassOf("SchedVariant")) {
610 if (RW->isSubClassOf("SchedWrite"))
613 assert(RW->isSubClassOf("SchedRead") && "Unknown SchedReadWrite");
624 if (RWDef->isSubClassOf("SchedWrite"))
627 assert(RWDef->isSubClassOf("SchedRead") && "Unknown SchedReadWrite");
638 if (RWDef->isSubClassOf("SchedWrit
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H A DInstrInfoEmitter.cpp160 if (OpR->isSubClassOf("RegisterOperand"))
162 if (OpR->isSubClassOf("RegisterClass"))
164 else if (OpR->isSubClassOf("PointerLikeRegClass"))
174 if (OpR->isSubClassOf("PointerLikeRegClass"))
179 if (Op.Rec->isSubClassOf("PredicateOp"))
184 if (Op.Rec->isSubClassOf("OptionalDefOperand"))
189 if (Op.Rec->isSubClassOf("BranchTargetOperand"))
449 if ((OpR->isSubClassOf("Operand") ||
450 OpR->isSubClassOf("RegisterOperand") ||
451 OpR->isSubClassOf("RegisterClas
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H A DFastISelEmitter.cpp265 if (OpLeafRec->isSubClassOf("RegisterOperand"))
267 if (OpLeafRec->isSubClassOf("RegisterClass"))
269 else if (OpLeafRec->isSubClassOf("Register"))
271 else if (OpLeafRec->isSubClassOf("ValueType")) {
428 if (!OpLeafRec->isSubClassOf("Register"))
451 if (!Op->isSubClassOf("Instruction"))
470 if (ChildOp->getOperator()->isSubClassOf("Instruction")) {
484 if (Op0Rec->isSubClassOf("RegisterOperand"))
486 if (!Op0Rec->isSubClassOf("RegisterClass"))
H A DSubtargetEmitter.cpp664 if (!PRDef->isSubClassOf("ProcResGroup"))
825 if (PRDef->isSubClassOf("ProcResGroup")) {
868 if (SchedWrite.TheDef->isSubClassOf("SchedWriteRes"))
886 if (AliasDef && AliasDef->isSubClassOf("SchedWriteRes"))
892 if (!WR->isSubClassOf("WriteRes"))
919 if (SchedRead.TheDef->isSubClassOf("SchedReadAdvance"))
938 if (AliasDef && AliasDef->isSubClassOf("SchedReadAdvance"))
944 if (!RA->isSubClassOf("ReadAdvance"))
975 if (PRDef->isSubClassOf("ProcResGroup"))
982 if (SubDef->isSubClassOf("ProcResGrou
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H A DInfoByHwMode.h162 bool isSubClassOf(const RegSizeInfo &I) const;
175 bool isSubClassOf(const RegSizeInfoByHwMode &I) const;
H A DX86RecognizableInstr.cpp42 return Rec->isSubClassOf("RegisterClass") ||
43 Rec->isSubClassOf("RegisterOperand");
47 return Rec->isSubClassOf("Operand") &&
52 return Rec->isSubClassOf("Operand") &&
57 if (RegRec->isSubClassOf("RegisterClass"))
59 if (RegRec->isSubClassOf("RegisterOperand"))
66 if (MemRec->isSubClassOf("X86MemOperand"))
111 assert(Rec->isSubClassOf("X86Inst") && "Not a X86 Instruction");
168 if (!insn.TheDef->isSubClassOf("X86Inst"))
H A DGlobalISelEmitter.cpp296 if (Operator->isSubClassOf("SDNode"))
299 if (Operator->isSubClassOf("Intrinsic"))
302 if (Operator->isSubClassOf("ComplexPattern"))
307 if (Operator->isSubClassOf("SDNodeXForm"))
396 if (VDefInit->getDef()->isSubClassOf("RegisterOperand"))
398 if (VDefInit->getDef()->isSubClassOf("RegisterClass"))
4114 if (!CCDef || !CCDef->isSubClassOf("CondCode"))
4225 if (ChildRec->isSubClassOf("Register")) {
4243 SrcChild->getOperator()->isSubClassOf("ComplexPattern")) {
4266 if (SrcChild->getOperator()->isSubClassOf("SDNod
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H A DCodeGenSchedule.h60 IsRead = Def->isSubClassOf("SchedRead");
61 HasVariants = Def->isSubClassOf("SchedVariant");
68 IsSequence = Def->isSubClassOf("WriteSequence");
521 bool IsRead = Def->isSubClassOf("SchedRead");
H A DSubtargetFeatureInfo.cpp115 if (!D->getDef()->isSubClassOf("SubtargetFeature"))
/openbsd-current/gnu/llvm/clang/utils/TableGen/
H A DClangTypeNodesEmitter.cpp155 if (type.isSubClassOf(AlwaysDependentClassName))
157 if (type.isSubClassOf(NeverCanonicalClassName))
159 if (type.isSubClassOf(NeverCanonicalUnlessDependentClassName))
188 if (!type.isSubClassOf(LeafTypeClassName)) continue;
H A DClangSyntaxEmitter.cpp55 assert(N.Record->isSubClassOf("Alternatives") ||
56 N.Record->isSubClassOf("External") || N.Derived.empty());
57 assert(!N.Record->isSubClassOf("Alternatives") || !N.Derived.empty());
113 if (R.isSubClassOf("Optional")) {
115 } else if (R.isSubClassOf("AnyToken")) {
117 } else if (R.isSubClassOf("NodeType")) {
202 if (N.Record->isSubClassOf("External"))
216 if (N.Record->isSubClassOf("Sequence")) {
219 assert(C->isSubClassOf("Role"));
H A DASTTableGen.h110 bool isSubClassOf(llvm::StringRef className) const { function in class:clang::tblgen::WrappedRecord
111 return get()->isSubClassOf(className);
116 return (isSubClassOf(NodeClass::getTableGenNodeClassName())
283 if (isSubClassOf(ArrayTypeClassName))
290 if (isSubClassOf(OptionalTypeClassName))
297 if (isSubClassOf(SubclassPropertyTypeClassName))
311 return isSubClassOf(EnumPropertyTypeClassName);
H A DMveEmitter.cpp1071 if (R->isSubClassOf("Immediate"))
1073 else if (R->isSubClassOf("unpromoted"))
1078 if (R->isSubClassOf("PrimitiveType"))
1080 if (R->isSubClassOf("ComplexType"))
1091 if (!Op->isSubClassOf("ComplexTypeOp"))
1117 if (Op->isSubClassOf("CTO_Tuple")) {
1123 if (Op->isSubClassOf("CTO_Pointer")) {
1139 if (Op->isSubClassOf("CTO_ScaleSize")) {
1174 } else if (Op->isSubClassOf("Type")) {
1214 if (!TypeRec->isSubClassOf("Typ
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H A DClangAttrEmitter.cpp176 if (Attr->isSubClassOf("TargetSpecificAttr") &&
1915 if (Subject.isSubClassOf("DeclNode") || Subject.isSubClassOf("DeclBase") ||
1919 if (Subject.isSubClassOf("SubsetSubject"))
2976 if (Attr->isSubClassOf(TheRecord)) {
3146 if (R.isSubClassOf(InhClass))
3168 if (R.isSubClassOf(InhClass))
3198 if (R.isSubClassOf(InhClass) || !Args.empty())
3201 if (R.isSubClassOf(InhClass))
3328 if (Attr->isSubClassOf("TargetSpecificAtt
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