/openbsd-current/sys/dev/pci/drm/amd/display/dc/dsc/ |
H A D | rc_calc_dpi.c | 71 static void copy_rc_to_cfg(struct drm_dsc_config *dsc_cfg, const struct rc_params *rc) argument 75 dsc_cfg->rc_quant_incr_limit0 = rc->rc_quant_incr_limit0; 76 dsc_cfg->rc_quant_incr_limit1 = rc->rc_quant_incr_limit1; 77 dsc_cfg->initial_offset = rc->initial_fullness_offset; 78 dsc_cfg->initial_xmit_delay = rc->initial_xmit_delay; 79 dsc_cfg->first_line_bpg_offset = rc->first_line_bpg_offset; 80 dsc_cfg->second_line_bpg_offset = rc->second_line_bpg_offset; 81 dsc_cfg->flatness_min_qp = rc->flatness_min_qp; 82 dsc_cfg->flatness_max_qp = rc->flatness_max_qp; 84 dsc_cfg 103 struct drm_dsc_config dsc_cfg; local [all...] |
H A D | dc_dsc.c | 96 timing->dsc_cfg.bits_per_pixel, 97 timing->dsc_cfg.num_slices_h, 98 timing->dsc_cfg.is_dp); 179 struct dc_dsc_config *dsc_cfg); 832 * dsc_cfg - DSC configuration to use if it was possible to come up with 835 * dsc_cfg.bits_per_pixel (in U6.4 format) by pixel rate, e.g. 837 * dsc_stream_bitrate_kbps = (int)ceil(timing->pix_clk_khz * dsc_cfg.bits_per_pixel / 16.0); 846 struct dc_dsc_config *dsc_cfg) 862 memset(dsc_cfg, 0, sizeof(struct dc_dsc_config)); 884 dsc_cfg 839 setup_dsc_config( const struct dsc_dec_dpcd_caps *dsc_sink_caps, const struct dsc_enc_caps *dsc_enc_caps, int target_bandwidth_kbps, const struct dc_crtc_timing *timing, const struct dc_dsc_config_options *options, const enum dc_link_encoding_format link_encoding, struct dc_dsc_config *dsc_cfg) argument 1073 dc_dsc_compute_config( const struct display_stream_compressor *dsc, const struct dsc_dec_dpcd_caps *dsc_sink_caps, const struct dc_dsc_config_options *options, uint32_t target_bandwidth_kbps, const struct dc_crtc_timing *timing, const enum dc_link_encoding_format link_encoding, struct dc_dsc_config *dsc_cfg) argument [all...] |
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn20/ |
H A D | dcn20_dsc.c | 37 static bool dsc2_validate_stream(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg); 38 static void dsc2_set_config(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg, 166 static bool dsc2_validate_stream(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg) argument 171 if (dsc_cfg->pic_width > dsc20->max_image_width) 174 return dsc_prepare_config(dsc_cfg, &dsc20->reg_vals, &dsc_optc_cfg); 189 static void dsc2_set_config(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg, argument 196 dsc_config_log(dsc, dsc_cfg); 197 is_config_ok = dsc_prepare_config(dsc_cfg, &dsc20->reg_vals, dsc_optc_cfg); 205 bool dsc2_get_packed_pps(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg, uint8_t *dsc_packed_pps) argument 215 dsc_config_log(dsc, dsc_cfg); 366 dsc_prepare_config(const struct dsc_config *dsc_cfg, struct dsc_reg_values *dsc_reg_vals, struct dsc_optc_config *dsc_optc_cfg) argument [all...] |
H A D | dcn20_resource.c | 1666 struct dsc_config dsc_cfg; local 1677 dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left 1679 dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top 1681 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding; 1682 dsc_cfg.color_depth = stream->timing.display_color_depth; 1683 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; 1684 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; 1685 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; 1687 if (!pipe_ctx->stream_res.dsc->funcs->dsc_validate_stream(pipe_ctx->stream_res.dsc, &dsc_cfg)) [all...] |
H A D | dcn20_stream_encoder.c | 464 && !timing->dsc_cfg.ycbcr422_simple);
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H A D | dcn20_dsc.h | 561 bool dsc_prepare_config(const struct dsc_config *dsc_cfg, 585 const struct dsc_config *dsc_cfg,
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/openbsd-current/sys/dev/pci/drm/display/ |
H A D | drm_dsc_helper.c | 86 * @dsc_cfg: 98 const struct drm_dsc_config *dsc_cfg) 110 dsc_cfg->dsc_version_minor | 111 dsc_cfg->dsc_version_major << DSC_PPS_VERSION_MAJOR_SHIFT; 117 dsc_cfg->line_buf_depth | 118 dsc_cfg->bits_per_component << DSC_PPS_BPC_SHIFT; 122 ((dsc_cfg->bits_per_pixel & DSC_PPS_BPP_HIGH_MASK) >> 124 dsc_cfg->vbr_enable << DSC_PPS_VBR_EN_SHIFT | 125 dsc_cfg->simple_422 << DSC_PPS_SIMPLE422_SHIFT | 126 dsc_cfg 97 drm_dsc_pps_payload_pack(struct drm_dsc_picture_parameter_set *pps_payload, const struct drm_dsc_config *dsc_cfg) argument [all...] |
/openbsd-current/sys/dev/pci/drm/amd/display/dc/inc/hw/ |
H A D | dsc.h | 100 bool (*dsc_validate_stream)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg); 101 void (*dsc_set_config)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg, 103 bool (*dsc_get_packed_pps)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
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/openbsd-current/sys/dev/pci/drm/include/drm/display/ |
H A D | drm_dsc_helper.h | 23 const struct drm_dsc_config *dsc_cfg);
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn314/ |
H A D | dcn314_hwseq.c | 107 struct dsc_config dsc_cfg; local 112 dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt; 113 dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom; 114 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding; 115 dsc_cfg.color_depth = stream->timing.display_color_depth; 116 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; 117 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; 118 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); 119 dsc_cfg [all...] |
H A D | dcn314_dio_stream_encoder.c | 273 && !timing->dsc_cfg.ycbcr422_simple);
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/ |
H A D | dc_dsc.h | 86 struct dc_dsc_config *dsc_cfg);
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H A D | dc_hw_types.h | 960 struct dc_dsc_config dsc_cfg; member in struct:dc_crtc_timing
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/core/ |
H A D | dc_stream.c | 106 memset(&stream->timing.dsc_cfg, 0, sizeof(stream->timing.dsc_cfg)); 107 stream->timing.dsc_cfg.num_slices_h = 0; 108 stream->timing.dsc_cfg.num_slices_v = 0; 109 stream->timing.dsc_cfg.bits_per_pixel = 128; 110 stream->timing.dsc_cfg.block_pred_enable = 1; 111 stream->timing.dsc_cfg.linebuf_depth = 9; 112 stream->timing.dsc_cfg.version_minor = 2; 113 stream->timing.dsc_cfg.ycbcr422_simple = 0; 774 stream->timing.dsc_cfg [all...] |
H A D | amdgpu_dc.c | 2957 struct dc_dsc_config old_dsc_cfg = stream->timing.dsc_cfg; 2968 stream->timing.dsc_cfg = *update->dsc_config; 2971 stream->timing.dsc_cfg = old_dsc_cfg;
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/link/ |
H A D | link_dpms.c | 787 struct dsc_config dsc_cfg; local 792 dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt; 793 dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom; 794 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding; 795 dsc_cfg.color_depth = stream->timing.display_color_depth; 796 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; 797 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; 798 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); 799 dsc_cfg 886 struct dsc_config dsc_cfg; local [all...] |
H A D | link_validation.c | 129 if (timing->flags.DSC && !timing->dsc_cfg.is_frl)
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn32/ |
H A D | dcn32_hwseq.c | 1012 struct dsc_config dsc_cfg; local 1017 dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt; 1018 dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom; 1019 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding; 1020 dsc_cfg.color_depth = stream->timing.display_color_depth; 1021 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; 1022 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; 1023 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); 1024 dsc_cfg [all...] |
H A D | dcn32_dio_stream_encoder.c | 240 && !timing->dsc_cfg.ycbcr422_simple);
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/openbsd-current/sys/dev/pci/drm/amd/display/amdgpu_dm/ |
H A D | amdgpu_dm_mst_types.c | 827 memset(¶ms[i].timing->dsc_cfg, 0, sizeof(params[i].timing->dsc_cfg)); 835 ¶ms[i].timing->dsc_cfg)) { 839 params[i].timing->dsc_cfg.bits_per_pixel = params[i].bpp_overwrite; 841 params[i].timing->dsc_cfg.bits_per_pixel = vars[i + k].bpp_x16; 844 params[i].timing->dsc_cfg.num_slices_h = params[i].num_slices_h; 847 params[i].timing->dsc_cfg.num_slices_v = params[i].num_slices_v; 851 params[i].timing->dsc_cfg.mst_pbn = vars[i + k].pbn; 864 params[i].timing->dsc_cfg.bits_per_pixel,
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H A D | amdgpu_dm.c | 5870 struct dc_dsc_config dsc_cfg = {0}; local 5902 &dsc_cfg)) { 5903 stream->timing.dsc_cfg = dsc_cfg; 5905 stream->timing.dsc_cfg.bits_per_pixel = edp_max_bpp_x16; 5917 &dsc_cfg)) { 5918 stream->timing.dsc_cfg = dsc_cfg; 5961 &stream->timing.dsc_cfg)) { 5980 &stream->timing.dsc_cfg)) { [all...] |
/openbsd-current/sys/dev/pci/drm/amd/display/modules/power/ |
H A D | power_helpers.c | 953 !stream->timing.dsc_cfg.num_slices_v)) 959 if (stream->timing.dsc_cfg.num_slices_v == 0) 962 slice_height = pic_height / stream->timing.dsc_cfg.num_slices_v;
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn31/ |
H A D | dcn31_dccg.c | 566 && !params->timing->dsc_cfg.ycbcr422_simple)) {
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn10/ |
H A D | dcn10_optc.c | 1618 && !timing->dsc_cfg.ycbcr422_simple);
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dml/dcn20/ |
H A D | dcn20_fpu.c | 1367 pipes[pipe_cnt].dout.dsc_slices = res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.num_slices_h; 1508 !res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.ycbcr422_simple) 1520 pipes[pipe_cnt].dout.output_bpp = res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.bits_per_pixel / 16.0;
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