Searched refs:mdiocontrol (Results 1 - 3 of 3) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/et/include/
H A Dbcmenet47xx.h92 uint32 mdiocontrol; member in struct:_bcmenettregs
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/include/
H A Dpcie_core.h85 uint32 mdiocontrol; /* controls the mdio access: 0x128 */ member in struct:sbpcieregs::__anon3223::__anon3224
94 uint32 mdiocontrol; /* controls the mdio access: 0x128 */ member in struct:sbpcieregs::__anon3223::__anon3225
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/shared/
H A Dnicpci.c329 if (R_REG(pi->osh, &(pcieregs->u.pcie1.mdiocontrol)) & MDIOCTL_ACCESS_DONE) {
352 W_REG(pi->osh, &pcieregs->u.pcie2.mdiocontrol, mdioctrl);
409 W_REG(pi->osh, (&pcieregs->u.pcie2.mdiocontrol), mdio_ctrl);
442 W_REG(pi->osh, (&pcieregs->u.pcie1.mdiocontrol), MDIOCTL_PREAM_EN | MDIOCTL_DIVISOR_VAL);
467 if (R_REG(pi->osh, &(pcieregs->u.pcie1.mdiocontrol)) & MDIOCTL_ACCESS_DONE) {
474 W_REG(pi->osh, (&pcieregs->u.pcie1.mdiocontrol), 0);
483 W_REG(pi->osh, (&pcieregs->u.pcie1.mdiocontrol), 0);
1821 W_REG(pi->osh, (&pcieregs->u.pcie1.mdiocontrol), MDIOCTL_PREAM_EN | MDIOCTL_DIVISOR_VAL);
1855 W_REG(pi->osh, (&pcieregs->u.pcie1.mdiocontrol), 0);

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