/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-ep93xx/ |
H A D | system.h | 19 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); 20 __raw_writel(devicecfg | 0x80000000, EP93XX_SYSCON_DEVICE_CONFIG); 21 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); 22 __raw_writel(devicecfg & ~0x80000000, EP93XX_SYSCON_DEVICE_CONFIG);
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H A D | uncompress.h | 29 static void __raw_writel(unsigned int value, unsigned int ptr) function 66 __raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-pnx4008/ |
H A D | time.c | 64 __raw_writel(__raw_readl(HSTIM_MATCH0) + LATCH, 66 __raw_writel(MATCH0_INT, HSTIM_INT); /* clear interrupt */ 94 __raw_writel(RESET_COUNT, MSTIM_CTRL); 96 __raw_writel(0, MSTIM_CTRL); /* stop the timer */ 97 __raw_writel(0, MSTIM_MCTRL); 99 __raw_writel(RESET_COUNT, HSTIM_CTRL); 101 __raw_writel(0, HSTIM_CTRL); 102 __raw_writel(0, HSTIM_MCTRL); 103 __raw_writel(0, HSTIM_CCR); 104 __raw_writel(1 [all...] |
H A D | serial.c | 46 __raw_writel(0xC1, UART5_BASE_VA + UART_FCR_OFFSET); 47 __raw_writel(0xC1, UART3_BASE_VA + UART_FCR_OFFSET); 50 __raw_writel(0x00, UART5_BASE_VA); 51 __raw_writel(0x00, UART3_BASE_VA); 57 __raw_writel(0, UART5_BASE_VA + UART_FCR_OFFSET); 58 __raw_writel(0, UART3_BASE_VA + UART_FCR_OFFSET);
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H A D | irq.c | 42 __raw_writel(__raw_readl(INTC_ER(irq)) & ~INTC_BIT(irq), INTC_ER(irq)); /* mask interrupt */ 47 __raw_writel(__raw_readl(INTC_ER(irq)) | INTC_BIT(irq), INTC_ER(irq)); /* unmask interrupt */ 52 __raw_writel(__raw_readl(INTC_ER(irq)) & ~INTC_BIT(irq), INTC_ER(irq)); /* mask interrupt */ 53 __raw_writel(INTC_BIT(irq), INTC_SR(irq)); /* clear interrupt status */ 60 __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq)); /*edge sensitive */ 61 __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq)); /*rising edge */ 65 __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq)); /*edge sensitive */ 66 __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq)); /*falling edge */ 70 __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq)); /*level sensitive */ 71 __raw_writel(__raw_read [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/plat-s3c24xx/ |
H A D | irq.h | 35 __raw_writel(mask | parentbit, S3C2410_INTMSK); 39 __raw_writel(submask, S3C2410_INTSUBMSK); 56 __raw_writel(submask, S3C2410_INTSUBMSK); 57 __raw_writel(mask, S3C2410_INTMSK); 68 __raw_writel(bit, S3C2410_SUBSRCPND); 76 __raw_writel(parentmask, S3C2410_SRCPND); 77 __raw_writel(parentmask, S3C2410_INTPND); 86 __raw_writel(bit, S3C2410_SUBSRCPND); 94 __raw_writel(parentmask, S3C2410_SRCPND); 95 __raw_writel(parentmas [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-s3c2410/ |
H A D | system.h | 37 __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, 47 __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, 71 __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */ 74 __raw_writel(0x100, S3C2410_WTCNT); 75 __raw_writel(0x100, S3C2410_WTDAT); 78 __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
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H A D | uncompress.h | 104 #define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0) macro 118 __raw_writel(WDOG_COUNT, S3C2410_WTCNT); 123 __raw_writel(WDOG_COUNT, S3C2410_WTDAT); 124 __raw_writel(WDOG_COUNT, S3C2410_WTCNT); 125 __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON); 141 __raw_writel(0x4000, S3C2410_WTDAT); 142 __raw_writel(0x4000, S3C2410_WTCNT); 143 __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-ks8695/ |
H A D | system.h | 39 __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); 42 __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC); 45 __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
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H A D | uncompress.h | 25 __raw_writel(c, KS8695_UART_PA + KS8695_URTH);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-versatile/ |
H A D | system.h | 44 __raw_writel(0xa05f, IO_ADDRESS(VERSATILE_SYS_LOCK)); 45 __raw_writel(val, IO_ADDRESS(VERSATILE_SYS_RESETCTL)); 46 __raw_writel(0, IO_ADDRESS(VERSATILE_SYS_LOCK));
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2412/ |
H A D | irq.c | 54 __raw_writel(mask | bitval, S3C2410_INTMSK); 57 __raw_writel(mask | bitval, S3C2412_EINTMASK); 65 __raw_writel(bitval, S3C2412_EINTPEND); 66 __raw_writel(bitval, S3C2410_SRCPND); 67 __raw_writel(bitval, S3C2410_INTPND); 77 __raw_writel(mask|bitval, S3C2410_INTMSK); 80 __raw_writel(mask | bitval, S3C2412_EINTMASK); 82 __raw_writel(bitval, S3C2412_EINTPEND); 83 __raw_writel(bitval, S3C2410_SRCPND); 84 __raw_writel(bitva [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-iop13xx/ |
H A D | pci.c | 252 __raw_writel(status & IOP13XX_ATUX_ATUISR_ERROR, 288 __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3, 317 __raw_writel(val | value << where, IOP13XX_ATUX_OCCDR); 319 __raw_writel(addr, IOP13XX_ATUX_OCCAR); 320 __raw_writel(value, IOP13XX_ATUX_OCCDR); 384 __raw_writel(status, IOP13XX_ATUE_PIE_STS); 409 __raw_writel(addr, IOP13XX_ATUE_OCCAR); 431 __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3, 464 __raw_writel(val | value << where, IOP13XX_ATUE_OCCDR); 466 __raw_writel(add [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-realview/ |
H A D | localtimer.c | 41 __raw_writel(1, base + TWD_TIMER_INTSTAT); 72 __raw_writel(0x1, base + TWD_TIMER_CONTROL); 75 __raw_writel(0xFFFFFFFFU, base + TWD_TIMER_COUNTER); 90 __raw_writel(load, base + TWD_TIMER_LOAD); 91 __raw_writel(0x7, base + TWD_TIMER_CONTROL); 116 __raw_writel(load, base + TWD_TIMER_COUNTER); 119 __raw_writel(1 << IRQ_LOCALTIMER, 128 __raw_writel(0, TWD_BASE(cpu) + TWD_TIMER_CONTROL);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/input/serio/ |
H A D | i8042-ppcio.h | 71 __raw_writel(0x00000088, 0xff500008); 74 __raw_writel(0x03000000, 0xff50000c); 82 __raw_writel(0x00000000, 0xff50000c); 92 __raw_writel(0x00000088, 0xff500008); 95 __raw_writel(0x03000000, 0xff50000c); 104 __raw_writel(0x00000000, 0xff50000c);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-at91/ |
H A D | gpio.c | 77 __raw_writel(mask, pio + PIO_IDR); 78 __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR)); 79 __raw_writel(mask, pio + PIO_PER); 96 __raw_writel(mask, pio + PIO_IDR); 97 __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR)); 98 __raw_writel(mask, pio + PIO_ASR); 99 __raw_writel(mask, pio + PIO_PDR); 116 __raw_writel(mask, pio + PIO_IDR); 117 __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR)); 118 __raw_writel(mas [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/infiniband/hw/mthca/ |
H A D | mthca_doorbell.h | 86 __raw_writel(((__force u32 *) &val)[0], dest); 87 __raw_writel(((__force u32 *) &val)[1], dest + 4); 96 __raw_writel((__force u32) val[0], dest); 97 __raw_writel((__force u32) val[1], dest + 4);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-ks8695/ |
H A D | time.c | 93 __raw_writel(tmcon & ~TMCON_T1EN, KS8695_TMR_VA + KS8695_TMCON); 95 __raw_writel(tmout / 2, KS8695_TMR_VA + KS8695_T1TC); 96 __raw_writel(tmout / 2, KS8695_TMR_VA + KS8695_T1PD); 99 __raw_writel(tmcon | TMCON_T1EN, KS8695_TMR_VA + KS8695_TMCON);
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H A D | irq.c | 45 __raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN); 55 __raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN); 60 __raw_writel((1 << irqno), KS8695_IRQ_VA + KS8695_INTST); 127 __raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC); 150 __raw_writel(0, KS8695_IRQ_VA + KS8695_INTMC); 151 __raw_writel(0, KS8695_IRQ_VA + KS8695_INTEN);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/linux/mlx4/ |
H A D | doorbell.h | 80 __raw_writel(((__force u32 *) &val)[0], dest); 81 __raw_writel(((__force u32 *) &val)[1], dest + 4); 90 __raw_writel((__force u32) val[0], dest); 91 __raw_writel((__force u32) val[1], dest + 4);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-realview/ |
H A D | system.h | 48 __raw_writel(val, hdr_ctrl);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-versatile/ |
H A D | pci.c | 162 __raw_writel(val, addr); 283 __raw_writel(myslot, PCI_SELFID); 288 __raw_writel(val, local_pci_cfg_base + CSR_OFFSET); 293 __raw_writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_0); 294 __raw_writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_1); 295 __raw_writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2); 315 __raw_writel(VERSATILE_PCI_MEM_BASE0 >> 28, PCI_IMAP0); 316 __raw_writel(VERSATILE_PCI_MEM_BASE1 >> 28, PCI_IMAP1); 317 __raw_writel(VERSATILE_PCI_MEM_BASE2 >> 28, PCI_IMAP2); 319 __raw_writel(PHYS_OFFSE [all...] |
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/mach-s3c2410/ |
H A D | gpio.c | 57 __raw_writel(val, reg); 64 __raw_writel(val, S3C24XX_EXTINT2);
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H A D | pm.c | 51 __raw_writel(virt_to_phys(s3c2410_cpu_resume), S3C2410_GSTATUS3); 66 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM)); 82 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM)); 98 __raw_writel(tmp, S3C2410_GSTATUS2);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-at91/ |
H A D | io.h | 45 __raw_writel(value, addr + reg_offset);
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