Lines Matching refs:__raw_writel
252 __raw_writel(status & IOP13XX_ATUX_ATUISR_ERROR,
288 __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3,
317 __raw_writel(val | value << where, IOP13XX_ATUX_OCCDR);
319 __raw_writel(addr, IOP13XX_ATUX_OCCAR);
320 __raw_writel(value, IOP13XX_ATUX_OCCDR);
384 __raw_writel(status, IOP13XX_ATUE_PIE_STS);
409 __raw_writel(addr, IOP13XX_ATUE_OCCAR);
431 __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3,
464 __raw_writel(val | value << where, IOP13XX_ATUE_OCCDR);
466 __raw_writel(addr, IOP13XX_ATUE_OCCAR);
467 __raw_writel(value, IOP13XX_ATUE_OCCDR);
565 __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_MU_MUBAR);
566 __raw_writel(~(IOP13XX_MU_WINDOW_SIZE - 1), IOP13XX_ATUE_IALR0);
567 __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_ATUE_IATVR0);
568 __raw_writel(IOP13XX_MU_BASE_PCI, IOP13XX_ATUE_IABAR0);
573 __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1,
575 __raw_writel(0x0, IOP13XX_ATUE_IAUBAR1);
578 __raw_writel(PHYS_OFFSET | PCI_BASE_ADDRESS_MEM_TYPE_64 |
584 __raw_writel(0x0, IOP13XX_ATUE_IAUTVR1);
585 __raw_writel(PHYS_OFFSET, IOP13XX_ATUE_IATVR1);
589 __raw_writel(0x0, IOP13XX_ATUE_OUMWTVR1);
591 __raw_writel(IOP13XX_ATUE_OUMBAR_ENABLE |
598 __raw_writel(((IOP13XX_PCIE_LOWER_IO_PA >> 0x4) & 0xfffff000),
600 __raw_writel(IOP13XX_PCIE_LOWER_IO_BA, IOP13XX_ATUE_OIOWTVR);
610 __raw_writel(reg_val, IOP13XX_ATUE_OIOBAR);
618 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR0);
624 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR1);
630 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR2);
636 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR3);
648 __raw_writel(reg_val, IOP13XX_ATUE_ATUCR);
656 __raw_writel(IOP13XX_ATUE_ATUCR_IVM, IOP13XX_ATUE_ATUCR);
665 __raw_writel(0x0, IOP13XX_ATUE_IAUBAR0);
666 __raw_writel(0x0, IOP13XX_ATUE_IABAR0);
667 __raw_writel(0x0, IOP13XX_ATUE_IAUTVR0);
668 __raw_writel(0x0, IOP13XX_ATUE_IATVR0);
669 __raw_writel(0x0, IOP13XX_ATUE_IALR0);
672 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR0);
675 __raw_writel(0x0, IOP13XX_ATUE_IAUBAR1);
676 __raw_writel(0x0, IOP13XX_ATUE_IABAR1);
677 __raw_writel(0x0, IOP13XX_ATUE_IAUTVR1);
678 __raw_writel(0x0, IOP13XX_ATUE_IATVR1);
679 __raw_writel(0x0, IOP13XX_ATUE_IALR1);
682 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR1);
685 __raw_writel(0x0, IOP13XX_ATUE_IAUBAR2);
686 __raw_writel(0x0, IOP13XX_ATUE_IABAR2);
687 __raw_writel(0x0, IOP13XX_ATUE_IAUTVR2);
688 __raw_writel(0x0, IOP13XX_ATUE_IATVR2);
689 __raw_writel(0x0, IOP13XX_ATUE_IALR2);
692 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR2);
697 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR3);
702 __raw_writel((IOP13XX_PCIE_LOWER_IO_PA >> 0x4) & 0xfffff000,
704 __raw_writel(IOP13XX_PCIE_LOWER_IO_BA, IOP13XX_ATUE_OIOWTVR);
725 __raw_writel(reg_val & ~IOP13XX_ATUX_PCSR_P_RSTOUT,
734 __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_MU_MUBAR);
735 __raw_writel(~(IOP13XX_MU_WINDOW_SIZE - 1), IOP13XX_ATUX_IALR0);
736 __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_ATUX_IATVR0);
737 __raw_writel(IOP13XX_MU_BASE_PCI, IOP13XX_ATUX_IABAR0);
742 __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1,
744 __raw_writel(0x0, IOP13XX_ATUX_IAUBAR1);
747 __raw_writel(PHYS_OFFSET | PCI_BASE_ADDRESS_MEM_TYPE_64 |
753 __raw_writel(0x0, IOP13XX_ATUX_IAUTVR1);
754 __raw_writel(PHYS_OFFSET, IOP13XX_ATUX_IATVR1);
758 __raw_writel(0x0, IOP13XX_ATUX_OUMWTVR1);
760 __raw_writel(IOP13XX_ATUX_OUMBAR_ENABLE |
767 __raw_writel((IOP13XX_PCIX_LOWER_IO_PA >> 0x4) & 0xfffff000,
769 __raw_writel(IOP13XX_PCIX_LOWER_IO_BA, IOP13XX_ATUX_OIOWTVR);
779 __raw_writel(reg_val, IOP13XX_ATUX_OIOBAR);
787 __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR0);
793 __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR1);
799 __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR2);
805 __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR3);
816 __raw_writel(reg_val, IOP13XX_ATUX_ATUCR);
824 __raw_writel(0x0, IOP13XX_ATUX_ATUCR);
832 __raw_writel(0x0, IOP13XX_ATUX_IAUBAR0);
833 __raw_writel(0x0, IOP13XX_ATUX_IABAR0);
834 __raw_writel(0x0, IOP13XX_ATUX_IAUTVR0);
835 __raw_writel(0x0, IOP13XX_ATUX_IATVR0);
836 __raw_writel(0x0, IOP13XX_ATUX_IALR0);
839 __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR0);
842 __raw_writel(0x0, IOP13XX_ATUX_IAUBAR1);
843 __raw_writel(0x0, IOP13XX_ATUX_IABAR1);
844 __raw_writel(0x0, IOP13XX_ATUX_IAUTVR1);
845 __raw_writel(0x0, IOP13XX_ATUX_IATVR1);
846 __raw_writel(0x0, IOP13XX_ATUX_IALR1);
849 __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR1);
852 __raw_writel(0x0, IOP13XX_ATUX_IAUBAR2);
853 __raw_writel(0x0, IOP13XX_ATUX_IABAR2);
854 __raw_writel(0x0, IOP13XX_ATUX_IAUTVR2);
855 __raw_writel(0x0, IOP13XX_ATUX_IATVR2);
856 __raw_writel(0x0, IOP13XX_ATUX_IALR2);
859 __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR2);
862 __raw_writel(0x0, IOP13XX_ATUX_IAUBAR3);
863 __raw_writel(0x0, IOP13XX_ATUX_IABAR3);
864 __raw_writel(0x0, IOP13XX_ATUX_IAUTVR3);
865 __raw_writel(0x0, IOP13XX_ATUX_IATVR3);
866 __raw_writel(0x0, IOP13XX_ATUX_IALR3);
869 __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR3);
874 __raw_writel((IOP13XX_PCIX_LOWER_IO_PA >> 0x4) & 0xfffff000,
876 __raw_writel(IOP13XX_PCIX_LOWER_IO_BA, IOP13XX_ATUX_OIOWTVR);
970 __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3, IOP13XX_XBG_BECSR);
1041 __raw_writel(pcixsr, IOP13XX_ATUX_PCIXSR);
1062 __raw_writel(pcsr, IOP13XX_ATUE_PCSR);