| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/cris/arch-v32/drivers/ |
| H A D | iop_fw_load.c | 108 REG_WR_INT(iop_spu, regi_iop_spu0, rw_seq_pc, (i*4));
111 REG_WR_INT(iop_spu, regi_iop_spu1, rw_seq_pc, (i*4));
114 REG_WR_INT(iop_sw_cpu, regi_iop_sw_cpu, rw_mc_data, *data);
155 REG_WR_INT(iop_mpu, regi_iop_mpu, rw_immediate, *data);
180 REG_WR_INT(iop_mpu, regi_iop_mpu, rw_instr, MPU_BA_I(start_addr));
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| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-cris/arch-v32/hwregs/ |
| H A D | dma.h | 109 do { REG_WR_INT( dma, inst, rw_group, (int) group_descr ); \
117 do { REG_WR_INT( dma, inst, rw_group_down, (int) ctx_descr ); \
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| H A D | irq_nmi_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | strcop_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | ata_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | config_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | intr_vect_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | marb_bp_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | rt_trace_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | strmux_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | timer_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | marb_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
307 #ifndef REG_WR_INT
308 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | bif_core_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-cris/arch-v32/hwregs/iop/ |
| H A D | iop_version_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_crc_par_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_fifo_in_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_fifo_in_extra_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_fifo_out_extra_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_mpu_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_sap_in_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_scrc_in_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_scrc_out_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| H A D | iop_trigger_grp_defs.h | 48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
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| /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/cris/arch-v32/kernel/ |
| H A D | arbiter.c | 186 REG_WR_INT(marb_bp, watches[i].instance, rw_first_addr, watches[i].start);
187 REG_WR_INT(marb_bp, watches[i].instance, rw_last_addr, watches[i].end);
188 REG_WR_INT(marb_bp, watches[i].instance, rw_op, accesses);
189 REG_WR_INT(marb_bp, watches[i].instance, rw_clients, clients);
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| H A D | irq.c | 146 REG_WR_INT(intr_vect, irq_regs[cpu], rw_mask, intr_mask);
162 REG_WR_INT(intr_vect, irq_regs[cpu], rw_mask, intr_mask);
323 REG_WR_INT(intr_vect, irq_regs[cpu], rw_mask, mask);
346 REG_WR_INT(intr_vect, irq_regs[cpu], rw_mask, mask);
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