1#ifndef __iop_fifo_out_extra_defs_h 2#define __iop_fifo_out_extra_defs_h 3 4/* 5 * This file is autogenerated from 6 * file: ../../inst/io_proc/rtl/iop_fifo_out_extra.r 7 * id: <not found> 8 * last modfied: Mon Apr 11 16:10:10 2005 9 * 10 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_fifo_out_extra_defs.h ../../inst/io_proc/rtl/iop_fifo_out_extra.r 11 * id: $Id: iop_fifo_out_extra_defs.h,v 1.1.1.1 2007/08/03 18:53:23 Exp $ 12 * Any changes here will be lost. 13 * 14 * -*- buffer-read-only: t -*- 15 */ 16/* Main access macros */ 17#ifndef REG_RD 18#define REG_RD( scope, inst, reg ) \ 19 REG_READ( reg_##scope##_##reg, \ 20 (inst) + REG_RD_ADDR_##scope##_##reg ) 21#endif 22 23#ifndef REG_WR 24#define REG_WR( scope, inst, reg, val ) \ 25 REG_WRITE( reg_##scope##_##reg, \ 26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) 27#endif 28 29#ifndef REG_RD_VECT 30#define REG_RD_VECT( scope, inst, reg, index ) \ 31 REG_READ( reg_##scope##_##reg, \ 32 (inst) + REG_RD_ADDR_##scope##_##reg + \ 33 (index) * STRIDE_##scope##_##reg ) 34#endif 35 36#ifndef REG_WR_VECT 37#define REG_WR_VECT( scope, inst, reg, index, val ) \ 38 REG_WRITE( reg_##scope##_##reg, \ 39 (inst) + REG_WR_ADDR_##scope##_##reg + \ 40 (index) * STRIDE_##scope##_##reg, (val) ) 41#endif 42 43#ifndef REG_RD_INT 44#define REG_RD_INT( scope, inst, reg ) \ 45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg ) 46#endif 47 48#ifndef REG_WR_INT 49#define REG_WR_INT( scope, inst, reg, val ) \ 50 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) 51#endif 52 53#ifndef REG_RD_INT_VECT 54#define REG_RD_INT_VECT( scope, inst, reg, index ) \ 55 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \ 56 (index) * STRIDE_##scope##_##reg ) 57#endif 58 59#ifndef REG_WR_INT_VECT 60#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ 61 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \ 62 (index) * STRIDE_##scope##_##reg, (val) ) 63#endif 64 65#ifndef REG_TYPE_CONV 66#define REG_TYPE_CONV( type, orgtype, val ) \ 67 ( { union { orgtype o; type n; } r; r.o = val; r.n; } ) 68#endif 69 70#ifndef reg_page_size 71#define reg_page_size 8192 72#endif 73 74#ifndef REG_ADDR 75#define REG_ADDR( scope, inst, reg ) \ 76 ( (inst) + REG_RD_ADDR_##scope##_##reg ) 77#endif 78 79#ifndef REG_ADDR_VECT 80#define REG_ADDR_VECT( scope, inst, reg, index ) \ 81 ( (inst) + REG_RD_ADDR_##scope##_##reg + \ 82 (index) * STRIDE_##scope##_##reg ) 83#endif 84 85/* C-code for register scope iop_fifo_out_extra */ 86 87/* Register rs_rd_data, scope iop_fifo_out_extra, type rs */ 88typedef unsigned int reg_iop_fifo_out_extra_rs_rd_data; 89#define REG_RD_ADDR_iop_fifo_out_extra_rs_rd_data 0 90 91/* Register r_rd_data, scope iop_fifo_out_extra, type r */ 92typedef unsigned int reg_iop_fifo_out_extra_r_rd_data; 93#define REG_RD_ADDR_iop_fifo_out_extra_r_rd_data 4 94 95/* Register r_stat, scope iop_fifo_out_extra, type r */ 96typedef struct { 97 unsigned int avail_bytes : 4; 98 unsigned int last : 8; 99 unsigned int dif_in_en : 1; 100 unsigned int dif_out_en : 1; 101 unsigned int zero_data_last : 1; 102 unsigned int dummy1 : 17; 103} reg_iop_fifo_out_extra_r_stat; 104#define REG_RD_ADDR_iop_fifo_out_extra_r_stat 8 105 106/* Register rw_strb_dif_out, scope iop_fifo_out_extra, type rw */ 107typedef unsigned int reg_iop_fifo_out_extra_rw_strb_dif_out; 108#define REG_RD_ADDR_iop_fifo_out_extra_rw_strb_dif_out 12 109#define REG_WR_ADDR_iop_fifo_out_extra_rw_strb_dif_out 12 110 111/* Register rw_intr_mask, scope iop_fifo_out_extra, type rw */ 112typedef struct { 113 unsigned int urun : 1; 114 unsigned int last_data : 1; 115 unsigned int dav : 1; 116 unsigned int free : 1; 117 unsigned int orun : 1; 118 unsigned int dummy1 : 27; 119} reg_iop_fifo_out_extra_rw_intr_mask; 120#define REG_RD_ADDR_iop_fifo_out_extra_rw_intr_mask 16 121#define REG_WR_ADDR_iop_fifo_out_extra_rw_intr_mask 16 122 123/* Register rw_ack_intr, scope iop_fifo_out_extra, type rw */ 124typedef struct { 125 unsigned int urun : 1; 126 unsigned int last_data : 1; 127 unsigned int dav : 1; 128 unsigned int free : 1; 129 unsigned int orun : 1; 130 unsigned int dummy1 : 27; 131} reg_iop_fifo_out_extra_rw_ack_intr; 132#define REG_RD_ADDR_iop_fifo_out_extra_rw_ack_intr 20 133#define REG_WR_ADDR_iop_fifo_out_extra_rw_ack_intr 20 134 135/* Register r_intr, scope iop_fifo_out_extra, type r */ 136typedef struct { 137 unsigned int urun : 1; 138 unsigned int last_data : 1; 139 unsigned int dav : 1; 140 unsigned int free : 1; 141 unsigned int orun : 1; 142 unsigned int dummy1 : 27; 143} reg_iop_fifo_out_extra_r_intr; 144#define REG_RD_ADDR_iop_fifo_out_extra_r_intr 24 145 146/* Register r_masked_intr, scope iop_fifo_out_extra, type r */ 147typedef struct { 148 unsigned int urun : 1; 149 unsigned int last_data : 1; 150 unsigned int dav : 1; 151 unsigned int free : 1; 152 unsigned int orun : 1; 153 unsigned int dummy1 : 27; 154} reg_iop_fifo_out_extra_r_masked_intr; 155#define REG_RD_ADDR_iop_fifo_out_extra_r_masked_intr 28 156 157 158/* Constants */ 159enum { 160 regk_iop_fifo_out_extra_no = 0x00000000, 161 regk_iop_fifo_out_extra_rw_intr_mask_default = 0x00000000, 162 regk_iop_fifo_out_extra_yes = 0x00000001 163}; 164#endif /* __iop_fifo_out_extra_defs_h */ 165