Searched refs:READ_REG (Results 1 - 9 of 9) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/rio/
H A Dphb.h108 #define READ_REG 0x8000 /* Read CD1400 register */ macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/ide/pci/
H A Dopti621.c128 #define READ_REG 0 /* index of Read cycle timing register */ macro
303 write_reg(cycle1, READ_REG);
311 write_reg(cycle2, READ_REG);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ia64/hp/common/
H A Dsba_iommu.c277 #define READ_REG(addr) __raw_readq(addr) macro
292 DBG_INIT("IOC_IBASE : %016lx\n", READ_REG(hpa+IOC_IBASE));
293 DBG_INIT("IOC_IMASK : %016lx\n", READ_REG(hpa+IOC_IMASK));
294 DBG_INIT("IOC_TCNFG : %016lx\n", READ_REG(hpa+IOC_TCNFG));
295 DBG_INIT("IOC_PDIR_BASE: %016lx\n", READ_REG(hpa+IOC_PDIR_BASE));
648 READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */
1047 READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */
1055 READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */
1528 ioc->ibase = READ_REG(ioc->ioc_hpa + IOC_IBASE) & ~0x1UL;
1529 ioc->imask = READ_REG(io
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/parisc/
H A Dsba_iommu.c111 #define READ_REG(addr) READ_REG64(addr) macro
114 #define READ_REG(addr) READ_REG32(addr) macro
777 READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */
786 READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */
1170 ioc->ibase = READ_REG(ioc->ioc_hpa + IOC_IBASE);
1171 iova_space_size = ~(READ_REG(ioc->ioc_hpa + IOC_IMASK) & 0xFFFFFFFFUL) + 1;
1416 ioc_ctl = READ_REG(sba_dev->sba_hpa+IOC_CTRL);
1487 cfg_val = READ_REG(rope_cfg);
1499 READ_REG(sba_dev->ioc[i].ioc_hpa + ROPE7_CTL);
1503 READ_REG(sba_de
[all...]
H A Dlba_pci.c815 t = READ_REG##size(astro_iop_base + addr); \
872 t = READ_REG##size(PIOP_TO_GMMIO(LBA_DEV(l), addr)); \
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/ata/
H A Dpata_opti.c40 READ_REG = 0, /* index of Read cycle timing register */ enumerator in enum:__anon3883
158 opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG);
H A Dpata_optidma.c39 READ_REG = 0, /* index of Read cycle timing register */ enumerator in enum:__anon3884
179 iowrite8(data_rec_timing[pci_clock][pio], regio + READ_REG);
182 iowrite8(dma_data_rec_timing[pci_clock][dma], regio + READ_REG);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/atm/
H A Diphase.h152 #define READ_REG 0x5 macro
H A Diphase.c2663 case READ_REG:

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