Searched refs:CSR0_STRT (Results 1 - 6 of 6) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/
H A Dni65.h33 #define CSR0_STRT 0x0002 /* Start (RS) */ macro
H A Dsun3lance.c214 #define CSR0_STRT 0x0002 /* start (RS) */ macro
441 DREG = CSR0_IDON | CSR0_STRT | CSR0_INEA;
558 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
591 REGA( CSR0 ) = CSR0_INIT | CSR0_STRT;
625 REGA(CSR0) = CSR0_INEA | CSR0_TDMD | CSR0_STRT;
711 REGA(CSR0) = CSR0_STRT | CSR0_INEA;
749 REGA(CSR0) = CSR0_STRT | CSR0_INEA;
921 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;
H A Datarilance.c21 following AMD, CSR0_STRT should be set only after IDON is detected
315 #define CSR0_STRT 0x0002 /* start (RS) */ macro
678 DREG = CSR0_STRT;
774 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
887 DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP |
922 DREG = CSR0_STRT;
959 DREG = CSR0_STRT;
1139 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;
H A Dni65.c741 writedatareg(CSR0_STRT | csr0);
763 writedatareg(CSR0_STRT | csr0);
838 writedatareg(CSR0_CLRALL | CSR0_INEA | CSR0_STRT);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/arm/
H A Dam79c961a.h32 #define CSR0_STRT 0x0002 macro
H A Dam79c961a.c271 write_rreg (dev->base_addr, CSR0, CSR0_IENA|CSR0_STRT);

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