1/* atarilance.c: Ethernet driver for VME Lance cards on the Atari */
2/*
3	Written 1995/96 by Roman Hodek (Roman.Hodek@informatik.uni-erlangen.de)
4
5	This software may be used and distributed according to the terms
6	of the GNU General Public License, incorporated herein by reference.
7
8	This drivers was written with the following sources of reference:
9	 - The driver for the Riebl Lance card by the TU Vienna.
10	 - The modified TUW driver for PAM's VME cards
11	 - The PC-Linux driver for Lance cards (but this is for bus master
12       cards, not the shared memory ones)
13	 - The Amiga Ariadne driver
14
15	v1.0: (in 1.2.13pl4/0.9.13)
16	      Initial version
17	v1.1: (in 1.2.13pl5)
18	      more comments
19		  deleted some debugging stuff
20		  optimized register access (keep AREG pointing to CSR0)
21		  following AMD, CSR0_STRT should be set only after IDON is detected
22		  use memcpy() for data transfers, that also employs long word moves
23		  better probe procedure for 24-bit systems
24          non-VME-RieblCards need extra delays in memcpy
25		  must also do write test, since 0xfxe00000 may hit ROM
26		  use 8/32 tx/rx buffers, which should give better NFS performance;
27		    this is made possible by shifting the last packet buffer after the
28		    RieblCard reserved area
29    v1.2: (in 1.2.13pl8)
30	      again fixed probing for the Falcon; 0xfe01000 hits phys. 0x00010000
31		  and thus RAM, in case of no Lance found all memory contents have to
32		  be restored!
33		  Now possible to compile as module.
34	v1.3: 03/30/96 Jes Sorensen, Roman (in 1.3)
35	      Several little 1.3 adaptions
36		  When the lance is stopped it jumps back into little-endian
37		  mode. It is therefore necessary to put it back where it
38		  belongs, in big endian mode, in order to make things work.
39		  This might be the reason why multicast-mode didn't work
40		  before, but I'm not able to test it as I only got an Amiga
41		  (we had similar problems with the A2065 driver).
42
43*/
44
45static char version[] = "atarilance.c: v1.3 04/04/96 "
46					   "Roman.Hodek@informatik.uni-erlangen.de\n";
47
48#include <linux/netdevice.h>
49#include <linux/etherdevice.h>
50#include <linux/module.h>
51#include <linux/stddef.h>
52#include <linux/kernel.h>
53#include <linux/string.h>
54#include <linux/errno.h>
55#include <linux/skbuff.h>
56#include <linux/slab.h>
57#include <linux/interrupt.h>
58#include <linux/init.h>
59#include <linux/bitops.h>
60
61#include <asm/setup.h>
62#include <asm/irq.h>
63#include <asm/atarihw.h>
64#include <asm/atariints.h>
65#include <asm/io.h>
66
67/* Debug level:
68 *  0 = silent, print only serious errors
69 *  1 = normal, print error messages
70 *  2 = debug, print debug infos
71 *  3 = debug, print even more debug infos (packet data)
72 */
73
74#define	LANCE_DEBUG	1
75
76#ifdef LANCE_DEBUG
77static int lance_debug = LANCE_DEBUG;
78#else
79static int lance_debug = 1;
80#endif
81module_param(lance_debug, int, 0);
82MODULE_PARM_DESC(lance_debug, "atarilance debug level (0-3)");
83MODULE_LICENSE("GPL");
84
85/* Print debug messages on probing? */
86#undef LANCE_DEBUG_PROBE
87
88#define	DPRINTK(n,a)							\
89	do {										\
90		if (lance_debug >= n)					\
91			printk a;							\
92	} while( 0 )
93
94#ifdef LANCE_DEBUG_PROBE
95# define PROBE_PRINT(a)	printk a
96#else
97# define PROBE_PRINT(a)
98#endif
99
100/* These define the number of Rx and Tx buffers as log2. (Only powers
101 * of two are valid)
102 * Much more rx buffers (32) are reserved than tx buffers (8), since receiving
103 * is more time critical then sending and packets may have to remain in the
104 * board's memory when main memory is low.
105 */
106
107#define TX_LOG_RING_SIZE			3
108#define RX_LOG_RING_SIZE			5
109
110/* These are the derived values */
111
112#define TX_RING_SIZE			(1 << TX_LOG_RING_SIZE)
113#define TX_RING_LEN_BITS		(TX_LOG_RING_SIZE << 5)
114#define	TX_RING_MOD_MASK		(TX_RING_SIZE - 1)
115
116#define RX_RING_SIZE			(1 << RX_LOG_RING_SIZE)
117#define RX_RING_LEN_BITS		(RX_LOG_RING_SIZE << 5)
118#define	RX_RING_MOD_MASK		(RX_RING_SIZE - 1)
119
120#define TX_TIMEOUT	20
121
122/* The LANCE Rx and Tx ring descriptors. */
123struct lance_rx_head {
124	unsigned short			base;		/* Low word of base addr */
125	volatile unsigned char	flag;
126	unsigned char			base_hi;	/* High word of base addr (unused) */
127	short					buf_length;	/* This length is 2s complement! */
128	volatile short			msg_length;	/* This length is "normal". */
129};
130
131struct lance_tx_head {
132	unsigned short			base;		/* Low word of base addr */
133	volatile unsigned char	flag;
134	unsigned char			base_hi;	/* High word of base addr (unused) */
135	short					length;		/* Length is 2s complement! */
136	volatile short			misc;
137};
138
139struct ringdesc {
140	unsigned short	adr_lo;		/* Low 16 bits of address */
141	unsigned char	len;		/* Length bits */
142	unsigned char	adr_hi;		/* High 8 bits of address (unused) */
143};
144
145/* The LANCE initialization block, described in databook. */
146struct lance_init_block {
147	unsigned short	mode;		/* Pre-set mode */
148	unsigned char	hwaddr[6];	/* Physical ethernet address */
149	unsigned		filter[2];	/* Multicast filter (unused). */
150	/* Receive and transmit ring base, along with length bits. */
151	struct ringdesc	rx_ring;
152	struct ringdesc	tx_ring;
153};
154
155/* The whole layout of the Lance shared memory */
156struct lance_memory {
157	struct lance_init_block	init;
158	struct lance_tx_head	tx_head[TX_RING_SIZE];
159	struct lance_rx_head	rx_head[RX_RING_SIZE];
160	char					packet_area[0];	/* packet data follow after the
161											 * init block and the ring
162											 * descriptors and are located
163											 * at runtime */
164};
165
166/* RieblCard specifics:
167 * The original TOS driver for these cards reserves the area from offset
168 * 0xee70 to 0xeebb for storing configuration data. Of interest to us is the
169 * Ethernet address there, and the magic for verifying the data's validity.
170 * The reserved area isn't touch by packet buffers. Furthermore, offset 0xfffe
171 * is reserved for the interrupt vector number.
172 */
173#define	RIEBL_RSVD_START	0xee70
174#define	RIEBL_RSVD_END		0xeec0
175#define RIEBL_MAGIC			0x09051990
176#define RIEBL_MAGIC_ADDR	((unsigned long *)(((char *)MEM) + 0xee8a))
177#define RIEBL_HWADDR_ADDR	((unsigned char *)(((char *)MEM) + 0xee8e))
178#define RIEBL_IVEC_ADDR		((unsigned short *)(((char *)MEM) + 0xfffe))
179
180/* This is a default address for the old RieblCards without a battery
181 * that have no ethernet address at boot time. 00:00:36:04 is the
182 * prefix for Riebl cards, the 00:00 at the end is arbitrary.
183 */
184
185static unsigned char OldRieblDefHwaddr[6] = {
186	0x00, 0x00, 0x36, 0x04, 0x00, 0x00
187};
188
189
190/* I/O registers of the Lance chip */
191
192struct lance_ioreg {
193/* base+0x0 */	volatile unsigned short	data;
194/* base+0x2 */	volatile unsigned short	addr;
195				unsigned char			_dummy1[3];
196/* base+0x7 */	volatile unsigned char	ivec;
197				unsigned char			_dummy2[5];
198/* base+0xd */	volatile unsigned char	eeprom;
199				unsigned char			_dummy3;
200/* base+0xf */	volatile unsigned char	mem;
201};
202
203/* Types of boards this driver supports */
204
205enum lance_type {
206	OLD_RIEBL,		/* old Riebl card without battery */
207	NEW_RIEBL,		/* new Riebl card with battery */
208	PAM_CARD		/* PAM card with EEPROM */
209};
210
211static char *lance_names[] = {
212	"Riebl-Card (without battery)",
213	"Riebl-Card (with battery)",
214	"PAM intern card"
215};
216
217/* The driver's private device structure */
218
219struct lance_private {
220	enum lance_type		cardtype;
221	struct lance_ioreg	*iobase;
222	struct lance_memory	*mem;
223	int		 	cur_rx, cur_tx;	/* The next free ring entry */
224	int			dirty_tx;		/* Ring entries to be freed. */
225				/* copy function */
226	void			*(*memcpy_f)( void *, const void *, size_t );
227	struct net_device_stats stats;
228/* This must be long for set_bit() */
229	long			tx_full;
230	spinlock_t		devlock;
231};
232
233/* I/O register access macros */
234
235#define	MEM		lp->mem
236#define	DREG	IO->data
237#define	AREG	IO->addr
238#define	REGA(a)	(*( AREG = (a), &DREG ))
239
240/* Definitions for packet buffer access: */
241#define PKT_BUF_SZ		1544
242/* Get the address of a packet buffer corresponding to a given buffer head */
243#define	PKTBUF_ADDR(head)	(((unsigned char *)(MEM)) + (head)->base)
244
245/* Possible memory/IO addresses for probing */
246
247struct lance_addr {
248	unsigned long	memaddr;
249	unsigned long	ioaddr;
250	int				slow_flag;
251} lance_addr_list[] = {
252	{ 0xfe010000, 0xfe00fff0, 0 },	/* RieblCard VME in TT */
253	{ 0xffc10000, 0xffc0fff0, 0 },	/* RieblCard VME in MegaSTE
254									   (highest byte stripped) */
255	{ 0xffe00000, 0xffff7000, 1 },	/* RieblCard in ST
256									   (highest byte stripped) */
257	{ 0xffd00000, 0xffff7000, 1 },	/* RieblCard in ST with hw modif. to
258									   avoid conflict with ROM
259									   (highest byte stripped) */
260	{ 0xffcf0000, 0xffcffff0, 0 },	/* PAMCard VME in TT and MSTE
261									   (highest byte stripped) */
262	{ 0xfecf0000, 0xfecffff0, 0 },	/* Rhotron's PAMCard VME in TT and MSTE
263									   (highest byte stripped) */
264};
265
266#define	N_LANCE_ADDR	(sizeof(lance_addr_list)/sizeof(*lance_addr_list))
267
268
269/* Definitions for the Lance */
270
271/* tx_head flags */
272#define TMD1_ENP		0x01	/* end of packet */
273#define TMD1_STP		0x02	/* start of packet */
274#define TMD1_DEF		0x04	/* deferred */
275#define TMD1_ONE		0x08	/* one retry needed */
276#define TMD1_MORE		0x10	/* more than one retry needed */
277#define TMD1_ERR		0x40	/* error summary */
278#define TMD1_OWN 		0x80	/* ownership (set: chip owns) */
279
280#define TMD1_OWN_CHIP	TMD1_OWN
281#define TMD1_OWN_HOST	0
282
283/* tx_head misc field */
284#define TMD3_TDR		0x03FF	/* Time Domain Reflectometry counter */
285#define TMD3_RTRY		0x0400	/* failed after 16 retries */
286#define TMD3_LCAR		0x0800	/* carrier lost */
287#define TMD3_LCOL		0x1000	/* late collision */
288#define TMD3_UFLO		0x4000	/* underflow (late memory) */
289#define TMD3_BUFF		0x8000	/* buffering error (no ENP) */
290
291/* rx_head flags */
292#define RMD1_ENP		0x01	/* end of packet */
293#define RMD1_STP		0x02	/* start of packet */
294#define RMD1_BUFF		0x04	/* buffer error */
295#define RMD1_CRC		0x08	/* CRC error */
296#define RMD1_OFLO		0x10	/* overflow */
297#define RMD1_FRAM		0x20	/* framing error */
298#define RMD1_ERR		0x40	/* error summary */
299#define RMD1_OWN 		0x80	/* ownership (set: ship owns) */
300
301#define RMD1_OWN_CHIP	RMD1_OWN
302#define RMD1_OWN_HOST	0
303
304/* register names */
305#define CSR0	0		/* mode/status */
306#define CSR1	1		/* init block addr (low) */
307#define CSR2	2		/* init block addr (high) */
308#define CSR3	3		/* misc */
309#define CSR8	8	  	/* address filter */
310#define CSR15	15		/* promiscuous mode */
311
312/* CSR0 */
313/* (R=readable, W=writeable, S=set on write, C=clear on write) */
314#define CSR0_INIT	0x0001		/* initialize (RS) */
315#define CSR0_STRT	0x0002		/* start (RS) */
316#define CSR0_STOP	0x0004		/* stop (RS) */
317#define CSR0_TDMD	0x0008		/* transmit demand (RS) */
318#define CSR0_TXON	0x0010		/* transmitter on (R) */
319#define CSR0_RXON	0x0020		/* receiver on (R) */
320#define CSR0_INEA	0x0040		/* interrupt enable (RW) */
321#define CSR0_INTR	0x0080		/* interrupt active (R) */
322#define CSR0_IDON	0x0100		/* initialization done (RC) */
323#define CSR0_TINT	0x0200		/* transmitter interrupt (RC) */
324#define CSR0_RINT	0x0400		/* receiver interrupt (RC) */
325#define CSR0_MERR	0x0800		/* memory error (RC) */
326#define CSR0_MISS	0x1000		/* missed frame (RC) */
327#define CSR0_CERR	0x2000		/* carrier error (no heartbeat :-) (RC) */
328#define CSR0_BABL	0x4000		/* babble: tx-ed too many bits (RC) */
329#define CSR0_ERR	0x8000		/* error (RC) */
330
331/* CSR3 */
332#define CSR3_BCON	0x0001		/* byte control */
333#define CSR3_ACON	0x0002		/* ALE control */
334#define CSR3_BSWP	0x0004		/* byte swap (1=big endian) */
335
336
337
338/***************************** Prototypes *****************************/
339
340static int addr_accessible( volatile void *regp, int wordflag, int
341                            writeflag );
342static unsigned long lance_probe1( struct net_device *dev, struct lance_addr
343                                   *init_rec );
344static int lance_open( struct net_device *dev );
345static void lance_init_ring( struct net_device *dev );
346static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev );
347static irqreturn_t lance_interrupt( int irq, void *dev_id );
348static int lance_rx( struct net_device *dev );
349static int lance_close( struct net_device *dev );
350static struct net_device_stats *lance_get_stats( struct net_device *dev );
351static void set_multicast_list( struct net_device *dev );
352static int lance_set_mac_address( struct net_device *dev, void *addr );
353static void lance_tx_timeout (struct net_device *dev);
354
355/************************* End of Prototypes **************************/
356
357
358
359
360
361static void *slow_memcpy( void *dst, const void *src, size_t len )
362
363{	char *cto = dst;
364	const char *cfrom = src;
365
366	while( len-- ) {
367		*cto++ = *cfrom++;
368		MFPDELAY();
369	}
370	return( dst );
371}
372
373
374struct net_device * __init atarilance_probe(int unit)
375{
376	int i;
377	static int found;
378	struct net_device *dev;
379	int err = -ENODEV;
380
381	if (!MACH_IS_ATARI || found)
382		/* Assume there's only one board possible... That seems true, since
383		 * the Riebl/PAM board's address cannot be changed. */
384		return ERR_PTR(-ENODEV);
385
386	dev = alloc_etherdev(sizeof(struct lance_private));
387	if (!dev)
388		return ERR_PTR(-ENOMEM);
389	if (unit >= 0) {
390		sprintf(dev->name, "eth%d", unit);
391		netdev_boot_setup_check(dev);
392	}
393	SET_MODULE_OWNER(dev);
394
395	for( i = 0; i < N_LANCE_ADDR; ++i ) {
396		if (lance_probe1( dev, &lance_addr_list[i] )) {
397			found = 1;
398			err = register_netdev(dev);
399			if (!err)
400				return dev;
401			free_irq(dev->irq, dev);
402			break;
403		}
404	}
405	free_netdev(dev);
406	return ERR_PTR(err);
407}
408
409
410/* Derived from hwreg_present() in atari/config.c: */
411
412static int __init addr_accessible( volatile void *regp, int wordflag, int writeflag )
413{
414	int		ret;
415	long	flags;
416	long	*vbr, save_berr;
417
418	local_irq_save(flags);
419
420	__asm__ __volatile__ ( "movec	%/vbr,%0" : "=r" (vbr) : );
421	save_berr = vbr[2];
422
423	__asm__ __volatile__
424	(	"movel	%/sp,%/d1\n\t"
425		"movel	#Lberr,%2@\n\t"
426		"moveq	#0,%0\n\t"
427		"tstl   %3\n\t"
428		"bne	1f\n\t"
429		"moveb	%1@,%/d0\n\t"
430		"nop	\n\t"
431		"bra	2f\n"
432"1:		 movew	%1@,%/d0\n\t"
433		"nop	\n"
434"2:		 tstl   %4\n\t"
435		"beq	2f\n\t"
436		"tstl	%3\n\t"
437		"bne	1f\n\t"
438		"clrb	%1@\n\t"
439		"nop	\n\t"
440		"moveb	%/d0,%1@\n\t"
441		"nop	\n\t"
442		"bra	2f\n"
443"1:		 clrw	%1@\n\t"
444		"nop	\n\t"
445		"movew	%/d0,%1@\n\t"
446		"nop	\n"
447"2:		 moveq	#1,%0\n"
448"Lberr:	 movel	%/d1,%/sp"
449		: "=&d" (ret)
450		: "a" (regp), "a" (&vbr[2]), "rm" (wordflag), "rm" (writeflag)
451		: "d0", "d1", "memory"
452	);
453
454	vbr[2] = save_berr;
455	local_irq_restore(flags);
456
457	return( ret );
458}
459
460
461static unsigned long __init lance_probe1( struct net_device *dev,
462					   struct lance_addr *init_rec )
463{
464	volatile unsigned short *memaddr =
465		(volatile unsigned short *)init_rec->memaddr;
466	volatile unsigned short *ioaddr =
467		(volatile unsigned short *)init_rec->ioaddr;
468	struct lance_private	*lp;
469	struct lance_ioreg		*IO;
470	int 					i;
471	static int 				did_version;
472	unsigned short			save1, save2;
473
474	PROBE_PRINT(( "Probing for Lance card at mem %#lx io %#lx\n",
475				  (long)memaddr, (long)ioaddr ));
476
477	/* Test whether memory readable and writable */
478	PROBE_PRINT(( "lance_probe1: testing memory to be accessible\n" ));
479	if (!addr_accessible( memaddr, 1, 1 )) goto probe_fail;
480
481	/* Written values should come back... */
482	PROBE_PRINT(( "lance_probe1: testing memory to be writable (1)\n" ));
483	save1 = *memaddr;
484	*memaddr = 0x0001;
485	if (*memaddr != 0x0001) goto probe_fail;
486	PROBE_PRINT(( "lance_probe1: testing memory to be writable (2)\n" ));
487	*memaddr = 0x0000;
488	if (*memaddr != 0x0000) goto probe_fail;
489	*memaddr = save1;
490
491	/* First port should be readable and writable */
492	PROBE_PRINT(( "lance_probe1: testing ioport to be accessible\n" ));
493	if (!addr_accessible( ioaddr, 1, 1 )) goto probe_fail;
494
495	/* and written values should be readable */
496	PROBE_PRINT(( "lance_probe1: testing ioport to be writeable\n" ));
497	save2 = ioaddr[1];
498	ioaddr[1] = 0x0001;
499	if (ioaddr[1] != 0x0001) goto probe_fail;
500
501	/* The CSR0_INIT bit should not be readable */
502	PROBE_PRINT(( "lance_probe1: testing CSR0 register function (1)\n" ));
503	save1 = ioaddr[0];
504	ioaddr[1] = CSR0;
505	ioaddr[0] = CSR0_INIT | CSR0_STOP;
506	if (ioaddr[0] != CSR0_STOP) {
507		ioaddr[0] = save1;
508		ioaddr[1] = save2;
509		goto probe_fail;
510	}
511	PROBE_PRINT(( "lance_probe1: testing CSR0 register function (2)\n" ));
512	ioaddr[0] = CSR0_STOP;
513	if (ioaddr[0] != CSR0_STOP) {
514		ioaddr[0] = save1;
515		ioaddr[1] = save2;
516		goto probe_fail;
517	}
518
519	/* Now ok... */
520	PROBE_PRINT(( "lance_probe1: Lance card detected\n" ));
521	goto probe_ok;
522
523  probe_fail:
524	return( 0 );
525
526  probe_ok:
527	lp = (struct lance_private *)dev->priv;
528	MEM = (struct lance_memory *)memaddr;
529	IO = lp->iobase = (struct lance_ioreg *)ioaddr;
530	dev->base_addr = (unsigned long)ioaddr; /* informational only */
531	lp->memcpy_f = init_rec->slow_flag ? slow_memcpy : memcpy;
532
533	REGA( CSR0 ) = CSR0_STOP;
534
535	/* Now test for type: If the eeprom I/O port is readable, it is a
536	 * PAM card */
537	if (addr_accessible( &(IO->eeprom), 0, 0 )) {
538		/* Switch back to Ram */
539		i = IO->mem;
540		lp->cardtype = PAM_CARD;
541	}
542	else if (*RIEBL_MAGIC_ADDR == RIEBL_MAGIC) {
543		lp->cardtype = NEW_RIEBL;
544	}
545	else
546		lp->cardtype = OLD_RIEBL;
547
548	if (lp->cardtype == PAM_CARD ||
549		memaddr == (unsigned short *)0xffe00000) {
550		/* PAMs card and Riebl on ST use level 5 autovector */
551		if (request_irq(IRQ_AUTO_5, lance_interrupt, IRQ_TYPE_PRIO,
552		            "PAM/Riebl-ST Ethernet", dev)) {
553			printk( "Lance: request for irq %d failed\n", IRQ_AUTO_5 );
554			return( 0 );
555		}
556		dev->irq = (unsigned short)IRQ_AUTO_5;
557	}
558	else {
559		/* For VME-RieblCards, request a free VME int;
560		 * (This must be unsigned long, since dev->irq is short and the
561		 * IRQ_MACHSPEC bit would be cut off...)
562		 */
563		unsigned long irq = atari_register_vme_int();
564		if (!irq) {
565			printk( "Lance: request for VME interrupt failed\n" );
566			return( 0 );
567		}
568		if (request_irq(irq, lance_interrupt, IRQ_TYPE_PRIO,
569		            "Riebl-VME Ethernet", dev)) {
570			printk( "Lance: request for irq %ld failed\n", irq );
571			return( 0 );
572		}
573		dev->irq = irq;
574	}
575
576	printk("%s: %s at io %#lx, mem %#lx, irq %d%s, hwaddr ",
577		   dev->name, lance_names[lp->cardtype],
578		   (unsigned long)ioaddr,
579		   (unsigned long)memaddr,
580		   dev->irq,
581		   init_rec->slow_flag ? " (slow memcpy)" : "" );
582
583	/* Get the ethernet address */
584	switch( lp->cardtype ) {
585	  case OLD_RIEBL:
586		/* No ethernet address! (Set some default address) */
587		memcpy( dev->dev_addr, OldRieblDefHwaddr, 6 );
588		break;
589	  case NEW_RIEBL:
590		lp->memcpy_f( dev->dev_addr, RIEBL_HWADDR_ADDR, 6 );
591		break;
592	  case PAM_CARD:
593		i = IO->eeprom;
594		for( i = 0; i < 6; ++i )
595			dev->dev_addr[i] =
596				((((unsigned short *)MEM)[i*2] & 0x0f) << 4) |
597				((((unsigned short *)MEM)[i*2+1] & 0x0f));
598		i = IO->mem;
599		break;
600	}
601	for( i = 0; i < 6; ++i )
602		printk( "%02x%s", dev->dev_addr[i], (i < 5) ? ":" : "\n" );
603	if (lp->cardtype == OLD_RIEBL) {
604		printk( "%s: Warning: This is a default ethernet address!\n",
605				dev->name );
606		printk( "      Use \"ifconfig hw ether ...\" to set the address.\n" );
607	}
608
609	spin_lock_init(&lp->devlock);
610
611	MEM->init.mode = 0x0000;		/* Disable Rx and Tx. */
612	for( i = 0; i < 6; i++ )
613		MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
614	MEM->init.filter[0] = 0x00000000;
615	MEM->init.filter[1] = 0x00000000;
616	MEM->init.rx_ring.adr_lo = offsetof( struct lance_memory, rx_head );
617	MEM->init.rx_ring.adr_hi = 0;
618	MEM->init.rx_ring.len    = RX_RING_LEN_BITS;
619	MEM->init.tx_ring.adr_lo = offsetof( struct lance_memory, tx_head );
620	MEM->init.tx_ring.adr_hi = 0;
621	MEM->init.tx_ring.len    = TX_RING_LEN_BITS;
622
623	if (lp->cardtype == PAM_CARD)
624		IO->ivec = IRQ_SOURCE_TO_VECTOR(dev->irq);
625	else
626		*RIEBL_IVEC_ADDR = IRQ_SOURCE_TO_VECTOR(dev->irq);
627
628	if (did_version++ == 0)
629		DPRINTK( 1, ( version ));
630
631	/* The LANCE-specific entries in the device structure. */
632	dev->open = &lance_open;
633	dev->hard_start_xmit = &lance_start_xmit;
634	dev->stop = &lance_close;
635	dev->get_stats = &lance_get_stats;
636	dev->set_multicast_list = &set_multicast_list;
637	dev->set_mac_address = &lance_set_mac_address;
638
639	dev->tx_timeout = lance_tx_timeout;
640	dev->watchdog_timeo = TX_TIMEOUT;
641
642
643
644	memset( &lp->stats, 0, sizeof(lp->stats) );
645
646	return( 1 );
647}
648
649
650static int lance_open( struct net_device *dev )
651
652{	struct lance_private *lp = (struct lance_private *)dev->priv;
653	struct lance_ioreg	 *IO = lp->iobase;
654	int i;
655
656	DPRINTK( 2, ( "%s: lance_open()\n", dev->name ));
657
658	lance_init_ring(dev);
659	/* Re-initialize the LANCE, and start it when done. */
660
661	REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
662	REGA( CSR2 ) = 0;
663	REGA( CSR1 ) = 0;
664	REGA( CSR0 ) = CSR0_INIT;
665	/* From now on, AREG is kept to point to CSR0 */
666
667	i = 1000000;
668	while (--i > 0)
669		if (DREG & CSR0_IDON)
670			break;
671	if (i < 0 || (DREG & CSR0_ERR)) {
672		DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
673					  dev->name, i, DREG ));
674		DREG = CSR0_STOP;
675		return( -EIO );
676	}
677	DREG = CSR0_IDON;
678	DREG = CSR0_STRT;
679	DREG = CSR0_INEA;
680
681	netif_start_queue (dev);
682
683	DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG ));
684
685	return( 0 );
686}
687
688
689/* Initialize the LANCE Rx and Tx rings. */
690
691static void lance_init_ring( struct net_device *dev )
692
693{	struct lance_private *lp = (struct lance_private *)dev->priv;
694	int i;
695	unsigned offset;
696
697	lp->tx_full = 0;
698	lp->cur_rx = lp->cur_tx = 0;
699	lp->dirty_tx = 0;
700
701	offset = offsetof( struct lance_memory, packet_area );
702
703/* If the packet buffer at offset 'o' would conflict with the reserved area
704 * of RieblCards, advance it */
705#define	CHECK_OFFSET(o)														 \
706	do {																	 \
707		if (lp->cardtype == OLD_RIEBL || lp->cardtype == NEW_RIEBL) {		 \
708			if (((o) < RIEBL_RSVD_START) ? (o)+PKT_BUF_SZ > RIEBL_RSVD_START \
709										 : (o) < RIEBL_RSVD_END)			 \
710				(o) = RIEBL_RSVD_END;										 \
711		}																	 \
712	} while(0)
713
714	for( i = 0; i < TX_RING_SIZE; i++ ) {
715		CHECK_OFFSET(offset);
716		MEM->tx_head[i].base = offset;
717		MEM->tx_head[i].flag = TMD1_OWN_HOST;
718 		MEM->tx_head[i].base_hi = 0;
719		MEM->tx_head[i].length = 0;
720		MEM->tx_head[i].misc = 0;
721		offset += PKT_BUF_SZ;
722	}
723
724	for( i = 0; i < RX_RING_SIZE; i++ ) {
725		CHECK_OFFSET(offset);
726		MEM->rx_head[i].base = offset;
727		MEM->rx_head[i].flag = TMD1_OWN_CHIP;
728		MEM->rx_head[i].base_hi = 0;
729		MEM->rx_head[i].buf_length = -PKT_BUF_SZ;
730		MEM->rx_head[i].msg_length = 0;
731		offset += PKT_BUF_SZ;
732	}
733}
734
735
736/* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
737
738
739static void lance_tx_timeout (struct net_device *dev)
740{
741	struct lance_private *lp = (struct lance_private *) dev->priv;
742	struct lance_ioreg	 *IO = lp->iobase;
743
744	AREG = CSR0;
745	DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n",
746			  dev->name, DREG ));
747	DREG = CSR0_STOP;
748	/*
749	 * Always set BSWP after a STOP as STOP puts it back into
750	 * little endian mode.
751	 */
752	REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
753	lp->stats.tx_errors++;
754#ifndef final_version
755		{	int i;
756			DPRINTK( 2, ( "Ring data: dirty_tx %d cur_tx %d%s cur_rx %d\n",
757						  lp->dirty_tx, lp->cur_tx,
758						  lp->tx_full ? " (full)" : "",
759						  lp->cur_rx ));
760			for( i = 0 ; i < RX_RING_SIZE; i++ )
761				DPRINTK( 2, ( "rx #%d: base=%04x blen=%04x mlen=%04x\n",
762							  i, MEM->rx_head[i].base,
763							  -MEM->rx_head[i].buf_length,
764							  MEM->rx_head[i].msg_length ));
765			for( i = 0 ; i < TX_RING_SIZE; i++ )
766				DPRINTK( 2, ( "tx #%d: base=%04x len=%04x misc=%04x\n",
767							  i, MEM->tx_head[i].base,
768							  -MEM->tx_head[i].length,
769							  MEM->tx_head[i].misc ));
770		}
771#endif
772	/* lance_restart, essentially */
773	lance_init_ring(dev);
774	REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
775	dev->trans_start = jiffies;
776	netif_wake_queue (dev);
777}
778
779/* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
780
781static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev )
782
783{	struct lance_private *lp = (struct lance_private *)dev->priv;
784	struct lance_ioreg	 *IO = lp->iobase;
785	int entry, len;
786	struct lance_tx_head *head;
787	unsigned long flags;
788
789	DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n",
790				  dev->name, DREG ));
791
792
793	/* The old LANCE chips doesn't automatically pad buffers to min. size. */
794	len = skb->len;
795	if (len < ETH_ZLEN)
796		len = ETH_ZLEN;
797	/* PAM-Card has a bug: Can only send packets with even number of bytes! */
798	else if (lp->cardtype == PAM_CARD && (len & 1))
799		++len;
800
801	if (len > skb->len) {
802		if (skb_padto(skb, len))
803			return 0;
804	}
805
806	netif_stop_queue (dev);
807
808	/* Fill in a Tx ring entry */
809	if (lance_debug >= 3) {
810		u_char *p;
811		int i;
812		printk( "%s: TX pkt type 0x%04x from ", dev->name,
813				((u_short *)skb->data)[6]);
814		for( p = &((u_char *)skb->data)[6], i = 0; i < 6; i++ )
815			printk("%02x%s", *p++, i != 5 ? ":" : "" );
816		printk(" to ");
817		for( p = (u_char *)skb->data, i = 0; i < 6; i++ )
818			printk("%02x%s", *p++, i != 5 ? ":" : "" );
819		printk(" data at 0x%08x len %d\n", (int)skb->data,
820			   (int)skb->len );
821	}
822
823	/* We're not prepared for the int until the last flags are set/reset. And
824	 * the int may happen already after setting the OWN_CHIP... */
825	spin_lock_irqsave (&lp->devlock, flags);
826
827	/* Mask to ring buffer boundary. */
828	entry = lp->cur_tx & TX_RING_MOD_MASK;
829	head  = &(MEM->tx_head[entry]);
830
831	/* Caution: the write order is important here, set the "ownership" bits
832	 * last.
833	 */
834
835
836	head->length = -len;
837	head->misc = 0;
838	lp->memcpy_f( PKTBUF_ADDR(head), (void *)skb->data, skb->len );
839	head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP;
840	lp->stats.tx_bytes += skb->len;
841	dev_kfree_skb( skb );
842	lp->cur_tx++;
843	while( lp->cur_tx >= TX_RING_SIZE && lp->dirty_tx >= TX_RING_SIZE ) {
844		lp->cur_tx -= TX_RING_SIZE;
845		lp->dirty_tx -= TX_RING_SIZE;
846	}
847
848	/* Trigger an immediate send poll. */
849	DREG = CSR0_INEA | CSR0_TDMD;
850	dev->trans_start = jiffies;
851
852	if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) ==
853		TMD1_OWN_HOST)
854		netif_start_queue (dev);
855	else
856		lp->tx_full = 1;
857	spin_unlock_irqrestore (&lp->devlock, flags);
858
859	return 0;
860}
861
862/* The LANCE interrupt handler. */
863
864static irqreturn_t lance_interrupt( int irq, void *dev_id )
865{
866	struct net_device *dev = dev_id;
867	struct lance_private *lp;
868	struct lance_ioreg	 *IO;
869	int csr0, boguscnt = 10;
870	int handled = 0;
871
872	if (dev == NULL) {
873		DPRINTK( 1, ( "lance_interrupt(): interrupt for unknown device.\n" ));
874		return IRQ_NONE;
875	}
876
877	lp = (struct lance_private *)dev->priv;
878	IO = lp->iobase;
879	spin_lock (&lp->devlock);
880
881	AREG = CSR0;
882
883	while( ((csr0 = DREG) & (CSR0_ERR | CSR0_TINT | CSR0_RINT)) &&
884		   --boguscnt >= 0) {
885		handled = 1;
886		/* Acknowledge all of the current interrupt sources ASAP. */
887		DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP |
888									CSR0_TDMD | CSR0_INEA);
889
890		DPRINTK( 2, ( "%s: interrupt  csr0=%04x new csr=%04x.\n",
891					  dev->name, csr0, DREG ));
892
893		if (csr0 & CSR0_RINT)			/* Rx interrupt */
894			lance_rx( dev );
895
896		if (csr0 & CSR0_TINT) {			/* Tx-done interrupt */
897			int dirty_tx = lp->dirty_tx;
898
899			while( dirty_tx < lp->cur_tx) {
900				int entry = dirty_tx & TX_RING_MOD_MASK;
901				int status = MEM->tx_head[entry].flag;
902
903				if (status & TMD1_OWN_CHIP)
904					break;			/* It still hasn't been Txed */
905
906				MEM->tx_head[entry].flag = 0;
907
908				if (status & TMD1_ERR) {
909					/* There was an major error, log it. */
910					int err_status = MEM->tx_head[entry].misc;
911					lp->stats.tx_errors++;
912					if (err_status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
913					if (err_status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
914					if (err_status & TMD3_LCOL) lp->stats.tx_window_errors++;
915					if (err_status & TMD3_UFLO) {
916						/* Ackk!  On FIFO errors the Tx unit is turned off! */
917						lp->stats.tx_fifo_errors++;
918						/* Remove this verbosity later! */
919						DPRINTK( 1, ( "%s: Tx FIFO error! Status %04x\n",
920									  dev->name, csr0 ));
921						/* Restart the chip. */
922						DREG = CSR0_STRT;
923					}
924				} else {
925					if (status & (TMD1_MORE | TMD1_ONE | TMD1_DEF))
926						lp->stats.collisions++;
927					lp->stats.tx_packets++;
928				}
929
930				dirty_tx++;
931			}
932
933#ifndef final_version
934			if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
935				DPRINTK( 0, ( "out-of-sync dirty pointer,"
936							  " %d vs. %d, full=%ld.\n",
937							  dirty_tx, lp->cur_tx, lp->tx_full ));
938				dirty_tx += TX_RING_SIZE;
939			}
940#endif
941
942			if (lp->tx_full && (netif_queue_stopped(dev))
943				&& dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
944				/* The ring is no longer full, clear tbusy. */
945				lp->tx_full = 0;
946				netif_wake_queue (dev);
947			}
948
949			lp->dirty_tx = dirty_tx;
950		}
951
952		/* Log misc errors. */
953		if (csr0 & CSR0_BABL) lp->stats.tx_errors++; /* Tx babble. */
954		if (csr0 & CSR0_MISS) lp->stats.rx_errors++; /* Missed a Rx frame. */
955		if (csr0 & CSR0_MERR) {
956			DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), "
957						  "status %04x.\n", dev->name, csr0 ));
958			/* Restart the chip. */
959			DREG = CSR0_STRT;
960		}
961	}
962
963    /* Clear any other interrupt, and set interrupt enable. */
964	DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
965		   CSR0_IDON | CSR0_INEA;
966
967	DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n",
968				  dev->name, DREG ));
969
970	spin_unlock (&lp->devlock);
971	return IRQ_RETVAL(handled);
972}
973
974
975static int lance_rx( struct net_device *dev )
976
977{	struct lance_private *lp = (struct lance_private *)dev->priv;
978	int entry = lp->cur_rx & RX_RING_MOD_MASK;
979	int i;
980
981	DPRINTK( 2, ( "%s: rx int, flag=%04x\n", dev->name,
982				  MEM->rx_head[entry].flag ));
983
984	/* If we own the next entry, it's a new packet. Send it up. */
985	while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) {
986		struct lance_rx_head *head = &(MEM->rx_head[entry]);
987		int status = head->flag;
988
989		if (status != (RMD1_ENP|RMD1_STP)) {		/* There was an error. */
990			/* There is a tricky error noted by John Murphy,
991			   <murf@perftech.com> to Russ Nelson: Even with full-sized
992			   buffers it's possible for a jabber packet to use two
993			   buffers, with only the last correctly noting the error. */
994			if (status & RMD1_ENP)	/* Only count a general error at the */
995				lp->stats.rx_errors++; /* end of a packet.*/
996			if (status & RMD1_FRAM) lp->stats.rx_frame_errors++;
997			if (status & RMD1_OFLO) lp->stats.rx_over_errors++;
998			if (status & RMD1_CRC) lp->stats.rx_crc_errors++;
999			if (status & RMD1_BUFF) lp->stats.rx_fifo_errors++;
1000			head->flag &= (RMD1_ENP|RMD1_STP);
1001		} else {
1002			/* Malloc up new buffer, compatible with net-3. */
1003			short pkt_len = head->msg_length & 0xfff;
1004			struct sk_buff *skb;
1005
1006			if (pkt_len < 60) {
1007				printk( "%s: Runt packet!\n", dev->name );
1008				lp->stats.rx_errors++;
1009			}
1010			else {
1011				skb = dev_alloc_skb( pkt_len+2 );
1012				if (skb == NULL) {
1013					DPRINTK( 1, ( "%s: Memory squeeze, deferring packet.\n",
1014								  dev->name ));
1015					for( i = 0; i < RX_RING_SIZE; i++ )
1016						if (MEM->rx_head[(entry+i) & RX_RING_MOD_MASK].flag &
1017							RMD1_OWN_CHIP)
1018							break;
1019
1020					if (i > RX_RING_SIZE - 2) {
1021						lp->stats.rx_dropped++;
1022						head->flag |= RMD1_OWN_CHIP;
1023						lp->cur_rx++;
1024					}
1025					break;
1026				}
1027
1028				if (lance_debug >= 3) {
1029					u_char *data = PKTBUF_ADDR(head), *p;
1030					printk( "%s: RX pkt type 0x%04x from ", dev->name,
1031							((u_short *)data)[6]);
1032					for( p = &data[6], i = 0; i < 6; i++ )
1033						printk("%02x%s", *p++, i != 5 ? ":" : "" );
1034					printk(" to ");
1035					for( p = data, i = 0; i < 6; i++ )
1036						printk("%02x%s", *p++, i != 5 ? ":" : "" );
1037					printk(" data %02x %02x %02x %02x %02x %02x %02x %02x "
1038						   "len %d\n",
1039						   data[15], data[16], data[17], data[18],
1040						   data[19], data[20], data[21], data[22],
1041						   pkt_len );
1042				}
1043
1044				skb_reserve( skb, 2 );	/* 16 byte align */
1045				skb_put( skb, pkt_len );	/* Make room */
1046				lp->memcpy_f( skb->data, PKTBUF_ADDR(head), pkt_len );
1047				skb->protocol = eth_type_trans( skb, dev );
1048				netif_rx( skb );
1049				dev->last_rx = jiffies;
1050				lp->stats.rx_packets++;
1051				lp->stats.rx_bytes += pkt_len;
1052			}
1053		}
1054
1055		head->flag |= RMD1_OWN_CHIP;
1056		entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1057	}
1058	lp->cur_rx &= RX_RING_MOD_MASK;
1059
1060	/* From lance.c (Donald Becker): */
1061	/* We should check that at least two ring entries are free.	 If not,
1062	   we should free one and mark stats->rx_dropped++. */
1063
1064	return 0;
1065}
1066
1067
1068static int lance_close( struct net_device *dev )
1069
1070{	struct lance_private *lp = (struct lance_private *)dev->priv;
1071	struct lance_ioreg	 *IO = lp->iobase;
1072
1073	netif_stop_queue (dev);
1074
1075	AREG = CSR0;
1076
1077	DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n",
1078				  dev->name, DREG ));
1079
1080	/* We stop the LANCE here -- it occasionally polls
1081	   memory if we don't. */
1082	DREG = CSR0_STOP;
1083
1084	return 0;
1085}
1086
1087
1088static struct net_device_stats *lance_get_stats( struct net_device *dev )
1089
1090{	struct lance_private *lp = (struct lance_private *)dev->priv;
1091
1092	return &lp->stats;
1093}
1094
1095
1096/* Set or clear the multicast filter for this adaptor.
1097   num_addrs == -1		Promiscuous mode, receive all packets
1098   num_addrs == 0		Normal mode, clear multicast list
1099   num_addrs > 0		Multicast mode, receive normal and MC packets, and do
1100						best-effort filtering.
1101 */
1102
1103static void set_multicast_list( struct net_device *dev )
1104
1105{	struct lance_private *lp = (struct lance_private *)dev->priv;
1106	struct lance_ioreg	 *IO = lp->iobase;
1107
1108	if (netif_running(dev))
1109		/* Only possible if board is already started */
1110		return;
1111
1112	/* We take the simple way out and always enable promiscuous mode. */
1113	DREG = CSR0_STOP; /* Temporarily stop the lance. */
1114
1115	if (dev->flags & IFF_PROMISC) {
1116		/* Log any net taps. */
1117		DPRINTK( 2, ( "%s: Promiscuous mode enabled.\n", dev->name ));
1118		REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */
1119	} else {
1120		short multicast_table[4];
1121		int num_addrs = dev->mc_count;
1122		int i;
1123		/* We don't use the multicast table, but rely on upper-layer
1124		 * filtering. */
1125		memset( multicast_table, (num_addrs == 0) ? 0 : -1,
1126				sizeof(multicast_table) );
1127		for( i = 0; i < 4; i++ )
1128			REGA( CSR8+i ) = multicast_table[i];
1129		REGA( CSR15 ) = 0; /* Unset promiscuous mode */
1130	}
1131
1132	/*
1133	 * Always set BSWP after a STOP as STOP puts it back into
1134	 * little endian mode.
1135	 */
1136	REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
1137
1138	/* Resume normal operation and reset AREG to CSR0 */
1139	REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;
1140}
1141
1142
1143/* This is needed for old RieblCards and possible for new RieblCards */
1144
1145static int lance_set_mac_address( struct net_device *dev, void *addr )
1146
1147{	struct lance_private *lp = (struct lance_private *)dev->priv;
1148	struct sockaddr *saddr = addr;
1149	int i;
1150
1151	if (lp->cardtype != OLD_RIEBL && lp->cardtype != NEW_RIEBL)
1152		return( -EOPNOTSUPP );
1153
1154	if (netif_running(dev)) {
1155		/* Only possible while card isn't started */
1156		DPRINTK( 1, ( "%s: hwaddr can be set only while card isn't open.\n",
1157					  dev->name ));
1158		return( -EIO );
1159	}
1160
1161	memcpy( dev->dev_addr, saddr->sa_data, dev->addr_len );
1162	for( i = 0; i < 6; i++ )
1163		MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
1164	lp->memcpy_f( RIEBL_HWADDR_ADDR, dev->dev_addr, 6 );
1165	/* set also the magic for future sessions */
1166	*RIEBL_MAGIC_ADDR = RIEBL_MAGIC;
1167
1168	return( 0 );
1169}
1170
1171
1172#ifdef MODULE
1173static struct net_device *atarilance_dev;
1174
1175int __init init_module(void)
1176{
1177	atarilance_dev = atarilance_probe(-1);
1178	if (IS_ERR(atarilance_dev))
1179		return PTR_ERR(atarilance_dev);
1180	return 0;
1181}
1182
1183void __exit cleanup_module(void)
1184{
1185	unregister_netdev(atarilance_dev);
1186	free_irq(atarilance_dev->irq, atarilance_dev);
1187	free_netdev(atarilance_dev);
1188}
1189
1190#endif /* MODULE */
1191
1192
1193/*
1194 * Local variables:
1195 *  c-indent-level: 4
1196 *  tab-width: 4
1197 * End:
1198 */
1199