Searched refs:SI_MAXCORES (Results 1 - 7 of 7) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/shared/
H A Dsiutils_priv.h69 void *regs[SI_MAXCORES]; /* other regs va */
73 uint coreid[SI_MAXCORES]; /* id of each core */
74 uint32 coresba[SI_MAXCORES]; /* backplane address of each core */
75 void *regs2[SI_MAXCORES]; /* va of each core second register set (usbh20) */
76 uint32 coresba2[SI_MAXCORES]; /* address of each core second register set (usbh20) */
77 uint32 coresba_size[SI_MAXCORES]; /* backplane address space size */
78 uint32 coresba2_size[SI_MAXCORES]; /* second address space size */
81 void *wrappers[SI_MAXCORES]; /* other cores wrapper va */
82 uint32 wrapba[SI_MAXCORES]; /* address of controlling wrapper */
84 uint32 cia[SI_MAXCORES]; /* ero
[all...]
H A Dhndpci.c57 static pci_config_regs si_config_regs[SI_MAXCORES];
58 static si_bar_cfg_t si_bar_cfg[SI_MAXCORES];
67 static si_pci_cfg_t si_pci_cfg[SI_MAXCORES][MAXFUNCS];
73 static uint16 pci_ban[SI_MAXCORES] = { 0 };
518 if (dev >= SI_MAXCORES || func >= MAXFUNCS || (off + len) > sizeof(pci_config_regs))
554 if (dev >= SI_MAXCORES || func >= MAXFUNCS || (off + len) > sizeof(pci_config_regs))
1102 for (dev = 0; dev < SI_MAXCORES; dev ++) {
1135 if (cfg >= &si_config_regs[SI_MAXCORES]) {
H A Daiutils.c629 if (coreidx >= SI_MAXCORES)
H A Dsbutils.c385 if (coreidx >= SI_MAXCORES)
H A Dsiutils.c734 for (idx = 0; idx < SI_MAXCORES; idx++)
2082 for (idx = 0; idx < SI_MAXCORES; idx++) {
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/include/
H A Dhndsoc.h47 #define SI_MAXCORES 16 /* Max cores (this is arbitrary, for software macro
H A Dsiutils.h83 #define BADIDX (SI_MAXCORES + 1)

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