Searched refs:EMMA2RH_IRQ_BASE (Results 1 - 6 of 6) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-mips/emma2rh/
H A Demma2rh.h110 #define EMMA2RH_IRQ_BASE (CPU_IRQ_BASE + NUM_CPU_IRQ) macro
116 #define EMMA2RH_IRQ_INT0 (0 + EMMA2RH_IRQ_BASE)
117 #define EMMA2RH_IRQ_INT1 (1 + EMMA2RH_IRQ_BASE)
118 #define EMMA2RH_IRQ_INT2 (2 + EMMA2RH_IRQ_BASE)
119 #define EMMA2RH_IRQ_INT3 (3 + EMMA2RH_IRQ_BASE)
120 #define EMMA2RH_IRQ_INT4 (4 + EMMA2RH_IRQ_BASE)
121 #define EMMA2RH_IRQ_INT5 (5 + EMMA2RH_IRQ_BASE)
122 #define EMMA2RH_IRQ_INT6 (6 + EMMA2RH_IRQ_BASE)
123 #define EMMA2RH_IRQ_INT7 (7 + EMMA2RH_IRQ_BASE)
124 #define EMMA2RH_IRQ_INT8 (8 + EMMA2RH_IRQ_BASE)
[all...]
H A Dmarkeins.h34 #define EMMA2RH_SW_IRQ_BASE (EMMA2RH_IRQ_BASE + NUM_EMMA2RH_IRQ)
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm/emma2rh/
H A Demma2rh.h110 #define EMMA2RH_IRQ_BASE (CPU_IRQ_BASE + NUM_CPU_IRQ) macro
116 #define EMMA2RH_IRQ_INT0 (0 + EMMA2RH_IRQ_BASE)
117 #define EMMA2RH_IRQ_INT1 (1 + EMMA2RH_IRQ_BASE)
118 #define EMMA2RH_IRQ_INT2 (2 + EMMA2RH_IRQ_BASE)
119 #define EMMA2RH_IRQ_INT3 (3 + EMMA2RH_IRQ_BASE)
120 #define EMMA2RH_IRQ_INT4 (4 + EMMA2RH_IRQ_BASE)
121 #define EMMA2RH_IRQ_INT5 (5 + EMMA2RH_IRQ_BASE)
122 #define EMMA2RH_IRQ_INT6 (6 + EMMA2RH_IRQ_BASE)
123 #define EMMA2RH_IRQ_INT7 (7 + EMMA2RH_IRQ_BASE)
124 #define EMMA2RH_IRQ_INT8 (8 + EMMA2RH_IRQ_BASE)
[all...]
H A Dmarkeins.h34 #define EMMA2RH_SW_IRQ_BASE (EMMA2RH_IRQ_BASE + NUM_EMMA2RH_IRQ)
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/mips/emma2rh/common/
H A Dirq.c67 do_IRQ(EMMA2RH_IRQ_BASE + i);
92 do_IRQ(EMMA2RH_IRQ_BASE + i);
102 do_IRQ(EMMA2RH_IRQ_BASE + i);
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/mips/emma2rh/markeins/
H A Dirq.c105 emma2rh_irq_init(EMMA2RH_IRQ_BASE);
111 setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade);
112 setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE, &irq_cascade);

Completed in 37 milliseconds