1/* 2 * arch/mips/emma2rh/common/irq.c 3 * This file is common irq dispatcher. 4 * 5 * Copyright (C) NEC Electronics Corporation 2005-2006 6 * 7 * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c 8 * 9 * Copyright 2001 MontaVista Software Inc. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 24 */ 25#include <linux/init.h> 26#include <linux/interrupt.h> 27#include <linux/irq.h> 28#include <linux/types.h> 29 30#include <asm/system.h> 31#include <asm/mipsregs.h> 32#include <asm/debug.h> 33#include <asm/addrspace.h> 34#include <asm/bootinfo.h> 35 36#include <asm/emma2rh/emma2rh.h> 37 38/* 39 * the first level int-handler will jump here if it is a emma2rh irq 40 */ 41void emma2rh_irq_dispatch(void) 42{ 43 u32 intStatus; 44 u32 bitmask; 45 u32 i; 46 47 intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0) 48 & emma2rh_in32(EMMA2RH_BHIF_INT_EN_0); 49 50#ifdef EMMA2RH_SW_CASCADE 51 if (intStatus & 52 (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) { 53 u32 swIntStatus; 54 swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT) 55 & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); 56 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { 57 if (swIntStatus & bitmask) { 58 do_IRQ(EMMA2RH_SW_IRQ_BASE + i); 59 return; 60 } 61 } 62 } 63#endif 64 65 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { 66 if (intStatus & bitmask) { 67 do_IRQ(EMMA2RH_IRQ_BASE + i); 68 return; 69 } 70 } 71 72 intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1) 73 & emma2rh_in32(EMMA2RH_BHIF_INT_EN_1); 74 75#ifdef EMMA2RH_GPIO_CASCADE 76 if (intStatus & 77 (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) { 78 u32 gpioIntStatus; 79 gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST) 80 & emma2rh_in32(EMMA2RH_GPIO_INT_MASK); 81 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { 82 if (gpioIntStatus & bitmask) { 83 do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i); 84 return; 85 } 86 } 87 } 88#endif 89 90 for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) { 91 if (intStatus & bitmask) { 92 do_IRQ(EMMA2RH_IRQ_BASE + i); 93 return; 94 } 95 } 96 97 intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2) 98 & emma2rh_in32(EMMA2RH_BHIF_INT_EN_2); 99 100 for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) { 101 if (intStatus & bitmask) { 102 do_IRQ(EMMA2RH_IRQ_BASE + i); 103 return; 104 } 105 } 106} 107