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Searched refs:CPLB_USER_RD (Results 1 - 6 of 6) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/
H A D	cplb.h	`42 #define CPLB_ALL_ACCESS CPLB_SUPV_WR \| CPLB_USER_RD \| CPLB_USER_WR 48 #define CPLB_INOCACHE CPLB_USER_RD \| CPLB_VALID`
H A D	pgtable.h	`52 #define _PAGE_RD (CPLB_USER_RD) 54 #define _PAGE_USER (CPLB_USER_RD \| CPLB_USER_WR)`
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-bf533/
H A D	bf533.h	256 #define SDRAM_IGENERIC (CPLB_L1_CHBL \| CPLB_USER_RD \| CPLB_VALID \| CPLB_PORTPRIO) 258 #define L1_IMEMORY ( CPLB_USER_RD \| CPLB_VALID \| CPLB_LOCK) 259 #define SDRAM_INON_CHBL ( CPLB_USER_RD \| CPLB_VALID) 266 \| CPLB_SUPV_WR \| CPLB_USER_WR \| CPLB_USER_RD \| CPLB_VALID \| ANOMALY_05000158_WORKAROUND) 269 \| CPLB_SUPV_WR \| CPLB_USER_WR \| CPLB_USER_RD \| CPLB_VALID \| ANOMALY_05000158_WORKAROUND) 272 #define L1_DMEMORY (CPLB_SUPV_WR \| CPLB_USER_WR \| CPLB_USER_RD \| CPLB_VALID \| ANOMALY_05000158_WORKAROUND \| CPLB_LOCK \| CPLB_DIRTY) 273 #define SDRAM_DNON_CHBL (CPLB_SUPV_WR \| CPLB_USER_WR \| CPLB_USER_RD \| CPLB_VALID \| ANOMALY_05000158_WORKAROUND \| CPLB_DIRTY) 274 #define SDRAM_EBIU (CPLB_SUPV_WR \| CPLB_USER_WR \| CPLB_USER_RD \| CPLB_VALID \| ANOMALY_05000158_WORKAROUND \| CPLB_DIRTY)
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-bf537/
H A D	bf537.h	236 #define SDRAM_IGENERIC (CPLB_L1_CHBL \| CPLB_USER_RD \| CPLB_VALID \| CPLB_PORTPRIO) 238 #define L1_IMEMORY ( CPLB_USER_RD \| CPLB_VALID \| CPLB_LOCK) 239 #define SDRAM_INON_CHBL ( CPLB_USER_RD \| CPLB_VALID) 246 \| CPLB_SUPV_WR \| CPLB_USER_WR \| CPLB_USER_RD \| CPLB_VALID \| ANOMALY_05000158_WORKAROUND) 249 \| CPLB_SUPV_WR \| CPLB_USER_WR \| CPLB_USER_RD \| CPLB_VALID \| ANOMALY_05000158_WORKAROUND \| CPLB_DIRTY ) 253 #define L1_DMEMORY (CPLB_SUPV_WR \| CPLB_USER_WR \| CPLB_USER_RD \| CPLB_VALID \| ANOMALY_05000158_WORKAROUND \| CPLB_LOCK \| CPLB_DIRTY ) 254 #define SDRAM_DNON_CHBL (CPLB_SUPV_WR \| CPLB_USER_WR \| CPLB_USER_RD \| CPLB_VALID \| ANOMALY_05000158_WORKAROUND \| CPLB_DIRTY ) 255 #define SDRAM_EBIU (CPLB_SUPV_WR \| CPLB_USER_WR \| CPLB_USER_RD \| CPLB_VALID \| ANOMALY_05000158_WORKAROUND \| CPLB_DIRTY )
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-bf561/
H A D	bf561.h	332 #define SDRAM_IGENERIC (CPLB_L1_CHBL \| CPLB_USER_RD \| CPLB_VALID \| CPLB_PORTPRIO) 334 #define L1_IMEMORY ( CPLB_USER_RD \| CPLB_VALID \| CPLB_LOCK) 335 #define SDRAM_INON_CHBL ( CPLB_USER_RD \| CPLB_VALID) 342 \| CPLB_SUPV_WR \| CPLB_USER_WR \| CPLB_USER_RD \| CPLB_VALID \| ANOMALY_05000158_WORKAROUND) 345 \| CPLB_SUPV_WR \| CPLB_USER_WR \| CPLB_USER_RD \| CPLB_VALID \| ANOMALY_05000158_WORKAROUND) 349 #define L1_DMEMORY (CPLB_SUPV_WR \| CPLB_USER_WR \| CPLB_USER_RD \| CPLB_VALID \| ANOMALY_05000158_WORKAROUND \| CPLB_LOCK \| CPLB_DIRTY) 350 #define SDRAM_DNON_CHBL (CPLB_SUPV_WR \| CPLB_USER_WR \| CPLB_USER_RD \| CPLB_VALID \| ANOMALY_05000158_WORKAROUND \| CPLB_DIRTY) 351 #define SDRAM_EBIU (CPLB_SUPV_WR \| CPLB_USER_WR \| CPLB_USER_RD \| CPLB_VALID \| ANOMALY_05000158_WORKAROUND \| CPLB_DIRTY) 354 #define L2_MEMORY (CPLB_SUPV_WR \| CPLB_USER_WR \| CPLB_USER_RD \| CPLB_VALID \| ANOMALY_05000158_WORKAROUND \| CPLB_DIRTY)
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-common/
H A D	def_LPBlackfin.h	`643 #define CPLB_USER_RD 0x00000004 /* 0=no read access, 1=read access macro`

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