Searched refs:BIT11 (Results 1 - 7 of 7) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-arm/arch-integrator/
H A Dbits.h37 #define BIT11 0x00000800 macro
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/scsi/
H A Dtmscsim.h182 #define BIT11 0x00000800 macro
219 #define SRB_COMPLETED BIT11
H A Ddc395x.h61 #define BIT11 0x00000800 macro
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/linux/
H A Dsynclink.h31 #define BIT11 0x0800 macro
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/char/
H A Dsynclink_gt.c427 #define IRQ_TXUNDER BIT11 /* HDLC */
4135 case HDLC_ENCODING_NRZI_MARK: val |= BIT11; break;
4136 case HDLC_ENCODING_NRZI: val |= BIT11 + BIT10; break;
4139 case HDLC_ENCODING_BIPHASE_LEVEL: val |= BIT12 + BIT11; break;
4140 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break;
4199 case HDLC_ENCODING_NRZI_MARK: val |= BIT11; break;
4200 case HDLC_ENCODING_NRZI: val |= BIT11 + BIT10; break;
4203 case HDLC_ENCODING_BIPHASE_LEVEL: val |= BIT12 + BIT11; break;
4204 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break;
H A Dsynclink.c564 #define TCSR_UNDERWAIT BIT11
582 #define MISCSTATUS_RI_LATCHED BIT11
604 #define SICR_RI_ACTIVE BIT11
606 #define SICR_RI (BIT11+BIT10)
5012 RegValue |= BIT11;
5210 case HDLC_PREAMBLE_LENGTH_32BITS: RegValue |= BIT11; break;
5211 case HDLC_PREAMBLE_LENGTH_64BITS: RegValue |= BIT11 + BIT10; break;
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/char/pcmcia/
H A Dsynclink_cs.c306 #define IRQ_TIMER BIT11 // timer interrupt

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