Searched refs:MAC0_MAC_GMII_RXCLK_SEL (Results 1 - 4 of 4) sorted by relevance

/netgear-R7800-V1.0.2.28/package/qca-ssdk/src/src/hsl/isis/
H A Disis_interface_ctrl.c251 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, 0, reg);
405 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, 0, reg);
422 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, config->rxclk_select, reg);
497 SW_GET_FIELD_BY_REG(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, field, reg);
546 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, 0, reg);
691 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, 0, reg);
869 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, 0, reg);
1049 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, 0, reg);
/netgear-R7800-V1.0.2.28/package/qca-ssdk/src/src/hsl/isisc/
H A Disisc_interface_ctrl.c271 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, 0, reg);
577 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, 0, reg);
720 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, 0, reg);
737 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, config->rxclk_select, reg);
812 SW_GET_FIELD_BY_REG(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, field, reg);
863 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, 0, reg);
1010 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, 0, reg);
1240 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, 0, reg);
1445 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, MAC0_MAC_GMII_RXCLK_SEL, 0, reg);
/netgear-R7800-V1.0.2.28/package/qca-ssdk/src/include/hsl/isis/
H A Disis_reg.h158 #define MAC0_MAC_GMII_RXCLK_SEL macro
/netgear-R7800-V1.0.2.28/package/qca-ssdk/src/include/hsl/isisc/
H A Disisc_reg.h198 #define MAC0_MAC_GMII_RXCLK_SEL macro

Completed in 191 milliseconds