Searched refs:DRAM_BUF_REG5 (Results 1 - 7 of 7) sorted by relevance
| /netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/ |
| H A D | mvSysHwConfig.h | 292 #define DRAM_BUF_REG5 0x60a94 /* sdram timing control low */ macro
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| /netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/ |
| H A D | mvDramIfConfig.S | 166 ldr r1, =(INTER_REGS_BASE + DRAM_BUF_REG5)
641 MV_REG_WRITE_ASM (r4, r1, DRAM_BUF_REG5)
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| H A D | mvDramIf.c | 318 MV_REG_WRITE(DRAM_BUF_REG5, temp);
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| H A D | mvDramIfBasicInit.S | 291 MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG5)
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| /netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/ |
| H A D | mvDramIfConfig.S | 183 ldr r1, =(INTER_REGS_BASE + DRAM_BUF_REG5)
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| H A D | mvDramIfBasicInit.S | 229 MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG5)
583 MV_REG_WRITE_ASM(r4, r5, DRAM_BUF_REG5)
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| H A D | mvDramIf.c | 461 MV_REG_WRITE(DRAM_BUF_REG5, temp);
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