Searched refs:sel_clk (Results 1 - 5 of 5) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpu/drm/nouveau/
H A Dnv04_dfp.c214 state->sel_clk |= bits1618;
216 state->sel_clk &= ~bits1618;
233 if (nv_encoder->dcb->type == OUTPUT_LVDS && dev_priv->saved_reg.sel_clk & 0xf0) {
234 int shift = (dev_priv->saved_reg.sel_clk & 0x50) ? 0 : 1;
236 state->sel_clk &= ~0xf0;
237 state->sel_clk |= (head ? 0x40 : 0x10) << shift;
552 dev_priv->mode_reg.sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK);
553 dev_priv->mode_reg.sel_clk &= ~0xf0;
555 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, dev_priv->mode_reg.sel_clk);
H A Dnv04_crtc.c596 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, dev_priv->mode_reg.sel_clk);
617 state->sel_clk = saved->sel_clk & ~(0x5 << 16);
H A Dnouveau_bios.c3961 uint32_t sel_clk_binding, sel_clk; local
3990 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
3991 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);
4636 uint32_t sel_clk_binding, sel_clk; local
4668 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
4669 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);
4874 uint32_t sel_clk = bios_rd32(bios, NV_PRAMDAC_SEL_CLK); local
4876 if (((limit_match == NV_PRAMDAC_VPLL_COEFF || limit_match == VPLL1) && sel_clk & 0x20) ||
4877 ((limit_match == NV_RAMDAC_VPLL2 || limit_match == VPLL2) && sel_clk & 0x80)) {
H A Dnouveau_hw.c667 state->sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK);
743 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, state->sel_clk);
H A Dnouveau_drv.h487 uint32_t sel_clk; member in struct:nv04_mode_state

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