Searched refs:USB_SRP_CLKDIV (Results 1 - 6 of 6) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF525.h135 #define bfin_read_USB_SRP_CLKDIV() bfin_read16(USB_SRP_CLKDIV)
136 #define bfin_write_USB_SRP_CLKDIV(val) bfin_write16(USB_SRP_CLKDIV, val)
H A DdefBF525.h85 #define USB_SRP_CLKDIV 0xffc039f4 /* Used to program clock divide value for the clock fed to the SRP detection logic */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DcdefBF542.h258 #define bfin_read_USB_SRP_CLKDIV() bfin_read16(USB_SRP_CLKDIV)
259 #define bfin_write_USB_SRP_CLKDIV(val) bfin_write16(USB_SRP_CLKDIV, val)
H A DdefBF542.h152 #define USB_SRP_CLKDIV 0xffc03df4 /* Used to program clock divide value for the clock fed to the SRP detection logic */ macro
H A DcdefBF547.h425 #define bfin_read_USB_SRP_CLKDIV() bfin_read16(USB_SRP_CLKDIV)
426 #define bfin_write_USB_SRP_CLKDIV(val) bfin_write16(USB_SRP_CLKDIV, val)
H A DdefBF547.h266 #define USB_SRP_CLKDIV 0xffc03df4 /* Used to program clock divide value for the clock fed to the SRP detection logic */ macro

Completed in 95 milliseconds