Searched refs:REG_SET (Results 1 - 8 of 8) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpu/drm/radeon/
H A Dr300d.h60 REG_SET(PACKET0_BASE_INDEX, (reg) >> 2) | \
61 REG_SET(PACKET0_COUNT, (n)))
62 #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))
64 REG_SET(PACKET3_IT_OPCODE, (op)) | \
65 REG_SET(PACKET3_COUNT, (n)))
H A Drv515d.h201 REG_SET(PACKET0_BASE_INDEX, (reg) >> 2) | \
202 REG_SET(PACKET0_COUNT, (n)))
203 #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))
205 REG_SET(PACKET3_IT_OPCODE, (op)) | \
206 REG_SET(PACKET3_COUNT, (n)))
H A Drs400.c150 tmp = REG_SET(RS690_MC_AGP_TOP, rdev->mc.gtt_end >> 16);
151 tmp |= REG_SET(RS690_MC_AGP_START, rdev->mc.gtt_start >> 16);
H A Dr100d.h60 REG_SET(PACKET0_BASE_INDEX, (reg) >> 2) | \
61 REG_SET(PACKET0_COUNT, (n)))
62 #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))
64 REG_SET(PACKET3_IT_OPCODE, (op)) | \
65 REG_SET(PACKET3_COUNT, (n)))
H A Dr100.c997 tmp = (REG_SET(RADEON_RB_BUFSZ, rb_bufsz) |
998 REG_SET(RADEON_RB_BLKSZ, rb_blksz) |
999 REG_SET(RADEON_MAX_FETCH, max_fetch) |
1021 REG_SET(RADEON_INDIRECT2_START, indirect2_start) |
1022 REG_SET(RADEON_INDIRECT1_START, indirect1_start));
H A Devergreend.h582 #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))
H A Dradeon.h1176 #define REG_SET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK) macro
H A Dr600d.h34 #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))

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