Searched refs:MX_CLKSEL2_PLL_2x_VAL (Results 1 - 3 of 3) sorted by relevance
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-omap2/ |
H A D | opp2420_data.c | 30 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_165MHz, 37 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_100MHz, 43 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_100MHz, 50 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_133MHz, 56 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_133MHz, 63 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_100MHz, 69 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_100MHz, 76 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_133MHz, 82 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_133MHz, 89 MX_CLKSEL2_PLL_2x_VAL, [all...] |
H A D | opp2430_data.c | 30 MX_CLKSEL2_PLL_2x_VAL, R2_CM_CLKSEL_MDM_VAL, 38 MX_CLKSEL2_PLL_2x_VAL, R1_CM_CLKSEL_MDM_VAL, 46 MX_CLKSEL2_PLL_2x_VAL, R1_CM_CLKSEL_MDM_VAL, 54 MX_CLKSEL2_PLL_2x_VAL, R1_CM_CLKSEL_MDM_VAL, 94 MX_CLKSEL2_PLL_2x_VAL, RB_CM_CLKSEL_MDM_VAL, 102 MX_CLKSEL2_PLL_2x_VAL, RB_CM_CLKSEL_MDM_VAL,
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H A D | opp2xxx.h | 365 #define MX_CLKSEL2_PLL_2x_VAL (2 << 0) macro
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