Searched refs:mmMC_SEQ_PMG_CMD_EMRS_LP (Results 1 - 6 of 6) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_iceland_smumgr.c2441 *out_reg = mmMC_SEQ_PMG_CMD_EMRS_LP;
2530 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP;
2631 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_EMRS_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS));
H A Damdgpu_ci_smumgr.c2512 *out_reg = mmMC_SEQ_PMG_CMD_EMRS_LP;
2601 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP;
2702 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_EMRS_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS));
H A Damdgpu_tonga_smumgr.c2902 *out_reg = mmMC_SEQ_PMG_CMD_EMRS_LP;
2994 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP;
3104 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_EMRS_LP,
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_d.h919 #define mmMC_SEQ_PMG_CMD_EMRS_LP 0x0AA1 macro
H A Dgmc_8_1_d.h927 #define mmMC_SEQ_PMG_CMD_EMRS_LP 0xaa1 macro
H A Dgmc_7_1_d.h823 #define mmMC_SEQ_PMG_CMD_EMRS_LP 0xaa1 macro

Completed in 244 milliseconds