Searched refs:mmATC_L2_CACHE_DATA1 (Results 1 - 8 of 8) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/
H A Dgmc_8_2_d.h548 #define mmATC_L2_CACHE_DATA1 0xcda macro
H A Dgmc_8_1_d.h546 #define mmATC_L2_CACHE_DATA1 0xcda macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_0_offset.h1246 #define mmATC_L2_CACHE_DATA1 0x0645 macro
H A Dmmhub_9_1_offset.h1278 #define mmATC_L2_CACHE_DATA1 0x0645 macro
H A Dmmhub_9_3_0_offset.h1262 #define mmATC_L2_CACHE_DATA1 0x0645 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h1135 #define mmATC_L2_CACHE_DATA1 0x0805 macro
H A Dgc_9_1_offset.h1168 #define mmATC_L2_CACHE_DATA1 0x0805 macro
H A Dgc_9_2_1_offset.h1106 #define mmATC_L2_CACHE_DATA1 0x0805 macro

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