Searched refs:cgs_write_register (Results 1 - 16 of 16) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_smu7_smumgr.c48 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_11, smc_addr);
113 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, data);
149 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, data);
184 cgs_write_register(hwmgr->device, mmSMC_RESP_0, 0);
185 cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, msg);
201 cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, msg);
210 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, parameter);
217 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, parameter);
224 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, 0x20000);
226 cgs_write_register(hwmg
[all...]
H A Damdgpu_smu8_smumgr.c95 cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_ARG_0, parameter);
97 cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_RESP_0, 0);
98 cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_MSG_0, msg);
132 cgs_write_register(hwmgr->device, mmMP0PUB_IND_INDEX_0,
148 cgs_write_register(hwmgr->device, mmMP0PUB_IND_DATA_0, value);
164 cgs_write_register(hwmgr->device, mmMP0PUB_IND_INDEX, index);
202 cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, tmp);
211 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_CNTL, tmp);
215 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_LO, reg_data);
219 cgs_write_register(hwmg
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H A Damdgpu_iceland_smumgr.c171 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_0, start_addr);
176 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data);
2621 cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING));
2622 cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING));
2623 cgs_write_register(hwmgr->device, mmMC_SEQ_DLL_STBY_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_DLL_STBY));
2624 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0));
2625 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1));
2626 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL));
2627 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD));
2628 cgs_write_register(hwmg
[all...]
H A Damdgpu_ci_smumgr.c108 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_0, smc_addr);
139 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data);
175 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data);
217 cgs_write_register(hwmgr->device, mmSMC_RESP_0, 0);
218 cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, msg);
233 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, parameter);
2336 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_0, start_addr);
2341 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data);
2692 cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING));
2693 cgs_write_register(hwmg
[all...]
H A Damdgpu_tonga_smumgr.c3084 cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP,
3086 cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP,
3088 cgs_write_register(hwmgr->device, mmMC_SEQ_DLL_STBY_LP,
3090 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP,
3092 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1_LP,
3094 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL_LP,
3096 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD_LP,
3098 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL_LP,
3100 cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING_LP,
3102 cgs_write_register(hwmg
[all...]
H A Damdgpu_fiji_smumgr.c145 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, 0x20000);
146 cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, PPSMC_MSG_Test);
219 cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, 0x50000000);
221 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0xffffffff);
223 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0);
2526 cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP,
2528 cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP,
2530 cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2_LP,
2532 cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP,
2534 cgs_write_register(hwmg
[all...]
H A Damdgpu_polaris10_smumgr.c115 cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, 0x50000000);
117 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0xffffffff);
118 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/
H A Dcgs_common.h96 * cgs_write_register() - Write an MMIO register
134 cgs_write_register(device, mm##reg, (cgs_read_register(device, mm##reg) & ~CGS_REG_FIELD_MASK(reg, field)) | (val) << CGS_REG_FIELD_SHIFT(reg, field))
170 #define cgs_write_register(dev,offset,value) \ macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_acp.c382 cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val);
400 cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val);
418 cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val);
453 cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val);
470 cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Damdgpu_smu7_thermal.c159 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, FAN_CONTROL_FUZZY);
172 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, FAN_CONTROL_TABLE);
H A Dsmu_helper.h152 cgs_write_register(device, mm##reg, PHM_SET_FIELD( \
H A Damdgpu_smu_helper.c155 cgs_write_register(hwmgr->device, indirect_port, index);
192 cgs_write_register(hwmgr->device, indirect_port, index);
H A Damdgpu_vega10_powertune.c848 cgs_write_register(hwmgr->device, config_regs->offset, data);
1040 cgs_write_register(hwmgr->device, mmGC_DIDT_CTRL0, data);
1154 cgs_write_register(hwmgr->device, mmGC_EDC_CTRL, data);
H A Damdgpu_smu7_hwmgr.c149 cgs_write_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_INDEX, 0x9F);
481 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING, mc_arb_dram_timing);
482 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2, mc_arb_dram_timing2);
486 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING_1, mc_arb_dram_timing);
487 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2_1, mc_arb_dram_timing2);
496 cgs_write_register(hwmgr->device, mmMC_CG_CONFIG, mc_cg_config);
1171 cgs_write_register(hwmgr->device, 0x1488,
4260 cgs_write_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_INDEX,
H A Damdgpu_smu7_powertune.c949 cgs_write_register(hwmgr->device, config_regs->offset, data);
983 cgs_write_register(hwmgr->device, mmGRBM_GFX_INDEX, value);
1010 cgs_write_register(hwmgr->device, mmGRBM_GFX_INDEX, value2);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/
H A Ddm_services.h87 cgs_write_register(ctx->cgs_device, address, value);

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