Searched refs:PACKET3_SET_SH_REG (Results 1 - 11 of 11) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dsi_enums.h270 #define PACKET3_SET_SH_REG 0x76 macro
H A Dsoc15d.h271 #define PACKET3_SET_SH_REG 0x76 macro
H A Dnvd.h284 #define PACKET3_SET_SH_REG 0x76 macro
H A Dvid.h350 #define PACKET3_SET_SH_REG 0x76 macro
H A Dcikd.h468 #define PACKET3_SET_SH_REG 0x76 macro
H A Damdgpu_gfx_v8_0.c1576 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);
1582 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);
1602 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);
1608 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);
1628 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);
1634 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);
H A Damdgpu_gfx_v9_0.c4256 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);
4263 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);
4284 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);
4291 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);
4312 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);
4319 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);
H A Dsid.h1855 #define PACKET3_SET_SH_REG 0x76 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/radeon/
H A Dcikd.h1934 #define PACKET3_SET_SH_REG 0x76 macro
H A Dsid.h1792 #define PACKET3_SET_SH_REG 0x76 macro
H A Dradeon_si.c4585 case PACKET3_SET_SH_REG:
4688 case PACKET3_SET_SH_REG:

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