Searched refs:NV03_PFIFO_INTR_0 (Results 1 - 5 of 5) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/fifo/
H A Dnouveau_nvkm_engine_fifo_nv04.c83 nvkm_wr32(device, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_CACHE_ERROR);
178 nvkm_wr32(device, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_CACHE_ERROR);
251 u32 stat = nvkm_rd32(device, NV03_PFIFO_INTR_0) & mask;
272 nvkm_wr32(device, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_SEMAPHORE);
297 nvkm_wr32(device, NV03_PFIFO_INTR_0, stat);
324 nvkm_wr32(device, NV03_PFIFO_INTR_0, 0xffffffff);
H A Dnouveau_nvkm_engine_fifo_nv17.c77 nvkm_wr32(device, NV03_PFIFO_INTR_0, 0xffffffff);
H A Dnouveau_nvkm_engine_fifo_nv40.c108 nvkm_wr32(device, NV03_PFIFO_INTR_0, 0xffffffff);
H A Dregsnv04.h10 #define NV03_PFIFO_INTR_0 0x00002100 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/nouveau/
H A Dnouveau_reg.h446 #define NV03_PFIFO_INTR_0 0x00002100 macro

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