Searched refs:MMEA0_PERFCOUNTER1_CFG__PERF_SEL__SHIFT (Results 1 - 5 of 5) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_2_0_0_sh_mask.h4020 #define MMEA0_PERFCOUNTER1_CFG__PERF_SEL__SHIFT 0x0 macro
H A Dmmhub_1_0_sh_mask.h5053 #define MMEA0_PERFCOUNTER1_CFG__PERF_SEL__SHIFT 0x0 macro
[all...]
H A Dmmhub_9_1_sh_mask.h4505 #define MMEA0_PERFCOUNTER1_CFG__PERF_SEL__SHIFT 0x0 macro
[all...]
H A Dmmhub_9_3_0_sh_mask.h5072 #define MMEA0_PERFCOUNTER1_CFG__PERF_SEL__SHIFT 0x0 macro
[all...]
H A Dmmhub_9_4_1_sh_mask.h11127 #define MMEA0_PERFCOUNTER1_CFG__PERF_SEL__SHIFT macro
[all...]

Completed in 1221 milliseconds