Searched refs:DISABLE_MEM_PWR_CTRL (Results 1 - 18 of 18) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_8_0_enum.h1058 DISABLE_MEM_PWR_CTRL = 0x1, enumerator in enum:MEM_PWR_DIS_CTRL
H A Dsmu_7_1_3_enum.h1272 DISABLE_MEM_PWR_CTRL = 0x1, enumerator in enum:MEM_PWR_DIS_CTRL
H A Dsmu_7_1_2_enum.h1236 DISABLE_MEM_PWR_CTRL = 0x1, enumerator in enum:MEM_PWR_DIS_CTRL
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
H A Duvd_6_0_enum.h1071 DISABLE_MEM_PWR_CTRL = 0x1, enumerator in enum:MEM_PWR_DIS_CTRL
H A Duvd_5_0_enum.h1201 DISABLE_MEM_PWR_CTRL = 0x1, enumerator in enum:MEM_PWR_DIS_CTRL
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/
H A Dbif_5_1_enum.h1058 DISABLE_MEM_PWR_CTRL = 0x1, enumerator in enum:MEM_PWR_DIS_CTRL
H A Dbif_5_0_enum.h1188 DISABLE_MEM_PWR_CTRL = 0x1, enumerator in enum:MEM_PWR_DIS_CTRL
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/
H A Dgmc_8_2_enum.h1058 DISABLE_MEM_PWR_CTRL = 0x1, enumerator in enum:MEM_PWR_DIS_CTRL
H A Dgmc_8_1_enum.h1188 DISABLE_MEM_PWR_CTRL = 0x1, enumerator in enum:MEM_PWR_DIS_CTRL
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
H A Doss_3_0_1_enum.h1454 DISABLE_MEM_PWR_CTRL = 0x1, enumerator in enum:MEM_PWR_DIS_CTRL
H A Doss_3_0_enum.h1487 DISABLE_MEM_PWR_CTRL = 0x1, enumerator in enum:MEM_PWR_DIS_CTRL
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_enum.h1763 DISABLE_MEM_PWR_CTRL = 0x1, enumerator in enum:MEM_PWR_DIS_CTRL
H A Ddce_11_0_enum.h5630 DISABLE_MEM_PWR_CTRL = 0x1, enumerator in enum:MEM_PWR_DIS_CTRL
H A Ddce_11_2_enum.h6268 DISABLE_MEM_PWR_CTRL = 0x1, enumerator in enum:MEM_PWR_DIS_CTRL
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_enum.h6798 DISABLE_MEM_PWR_CTRL = 0x1, enumerator in enum:MEM_PWR_DIS_CTRL
H A Dgfx_8_0_enum.h6848 DISABLE_MEM_PWR_CTRL = 0x1, enumerator in enum:MEM_PWR_DIS_CTRL
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/
H A Dnavi10_enum.h9542 DISABLE_MEM_PWR_CTRL = 0x00000001, enumerator in enum:MEM_PWR_DIS_CTRL
H A Dvega10_enum.h207 DISABLE_MEM_PWR_CTRL = 0x00000001, enumerator in enum:MEM_PWR_DIS_CTRL

Completed in 1376 milliseconds