Searched refs:CAR_SATA_PLL_CFG0_SEQ_LANE_PD_INPUT_VALUE (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/arch/arm/nvidia/
H A Dtegra124_carreg.h518 #define CAR_SATA_PLL_CFG0_SEQ_LANE_PD_INPUT_VALUE __BIT(6) macro
H A Dtegra210_carreg.h557 #define CAR_SATA_PLL_CFG0_SEQ_LANE_PD_INPUT_VALUE __BIT(6) macro

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