Searched refs:CAR_PLLE_AUX_REG (Results 1 - 4 of 4) sorted by relevance

/netbsd-current/sys/arch/arm/nvidia/
H A Dtegra210_car.c618 CAR_PLLE_AUX_REG, CAR_PLLE_AUX_CML0_OEN),
620 CAR_PLLE_AUX_REG, CAR_PLLE_AUX_CML1_OEN),
1011 tegra_reg_set_clear(bst, bsh, CAR_PLLE_AUX_REG, 0, CAR_PLLE_AUX_REF_SEL_PLLREFE);
1012 tegra_reg_set_clear(bst, bsh, CAR_PLLE_AUX_REG, 0, CAR_PLLE_AUX_REF_SRC);
1044 tegra_reg_set_clear(bst, bsh, CAR_PLLE_AUX_REG, 0, CAR_PLLE_AUX_SS_SWCTL);
1045 tegra_reg_set_clear(bst, bsh, CAR_PLLE_AUX_REG, 0, CAR_PLLE_AUX_ENABLE_SWCTL);
1046 tegra_reg_set_clear(bst, bsh, CAR_PLLE_AUX_REG, CAR_PLLE_AUX_SS_SEQ_INCLUDE, 0);
1047 tegra_reg_set_clear(bst, bsh, CAR_PLLE_AUX_REG, CAR_PLLE_AUX_USE_LOCKDET, 0);
1049 tegra_reg_set_clear(bst, bsh, CAR_PLLE_AUX_REG, CAR_PLLE_AUX_SEQ_ENABLE, 0);
H A Dtegra124_carreg.h496 #define CAR_PLLE_AUX_REG 0x48c macro
H A Dtegra210_carreg.h534 #define CAR_PLLE_AUX_REG 0x48c macro
H A Dtegra124_car.c629 CAR_PLLE_AUX_REG, CAR_PLLE_AUX_CML0_OEN),
631 CAR_PLLE_AUX_REG, CAR_PLLE_AUX_CML1_OEN),

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