Searched refs:CAR_PLLD2_BASE_REG (Results 1 - 4 of 4) sorted by relevance
| /netbsd-current/sys/arch/arm/nvidia/ |
| H A D | tegra124_car.c | 448 CLK_PLL("pll_d2", "clk_m", CAR_PLLD2_BASE_REG,
1106 } else if (tpll->base_reg == CAR_PLLD2_BASE_REG) {
1155 tegra_reg_set_clear(bst, bsh, CAR_PLLD2_BASE_REG,
1164 tegra_reg_set_clear(bst, bsh, CAR_PLLD2_BASE_REG,
1170 v = bus_space_read_4(bst, bsh, CAR_PLLD2_BASE_REG);
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| H A D | tegra124_carreg.h | 150 #define CAR_PLLD2_BASE_REG 0x4b8 macro
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| H A D | tegra210_carreg.h | 180 #define CAR_PLLD2_BASE_REG 0x4b8 macro
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| H A D | tegra210_car.c | 477 CLK_PLL("PLL_D2", "CLK_M", CAR_PLLD2_BASE_REG,
1234 } else if (tpll->base_reg == CAR_PLLD2_BASE_REG) {
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