Searched refs:interrupts (Results 1 - 25 of 71) sorted by relevance

123

/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/m68hc11/
H A Dinterrupts.c0 /* interrupts.c -- 68HC11 Interrupts Emulation
61 /* Serial interrupts. */
67 /* SPI interrupts. */
70 /* Realtime interrupts. */
74 /* Output compare interrupts. */
81 /* Input compare interrupts. */
110 '\0', NULL, "Print information about interrupts",
114 "Catch interrupts when they are raised or taken\n"
125 /* Initialize the interrupts module. */
129 struct interrupts *interrupt local
138 interrupts_reset(struct interrupts *interrupts) argument
205 struct interrupts *interrupts; local
283 interrupts_update_pending(struct interrupts *interrupts) argument
364 interrupts_get_current(struct interrupts *interrupts) argument
425 interrupts_process(struct interrupts *interrupts) argument
525 interrupts_raise(struct interrupts *interrupts, enum M6811_INT number) argument
532 interrupts_info(SIM_DESC sd, struct interrupts *interrupts) argument
[all...]
H A Dinterrupts.h0 /* interrupts.h -- 68HC11 Interrupts Emulation
24 /* Definition of 68HC11 interrupts. These enum are used as an index
85 This is used to understand in which order interrupts were
101 /* Information and control of pending interrupts. */
115 /* Management of 68HC11 interrupts:
116 - We use a table of 'interrupt_def' to describe the interrupts that must be
118 - We keep a mask of pending interrupts. This mask is refreshed by
122 first it maintains a min/max count of CPU cycles between which interrupts
123 are masked; second it checks for pending interrupts and raise one if
124 interrupts ar
125 struct interrupts { struct
138 struct interrupt interrupts[M6811_INT_NUMBER]; member in struct:interrupts
[all...]
H A DMakefile.in22 emulos.o interrupts.o m68hc11_sim.o
52 interrupts.h sim-main.h
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/testsuite/sim/frv/
H A Dinterrupts.exp11 foreach src [lsort [glob -nocomplain $srcdir/$subdir/interrupts/*.cgs]] {
/netbsd-6-1-5-RELEASE/sys/arch/macppc/dev/
H A Dcom_mainbus.c85 int interrupts[8]; local
95 OF_getprop(serial, "interrupts", interrupts, sizeof(interrupts));
110 intr_establish(interrupts[0], IST_LEVEL, IPL_SERIAL, comintr, sc);
/netbsd-6-1-5-RELEASE/sys/arch/newsmips/stand/boot/
H A Dlocore.S69 mtc0 zero, MIPS_COP_0_STATUS # disable interrupts
85 mtc0 v0, MIPS_COP_0_STATUS # enable interrupts
/netbsd-6-1-5-RELEASE/sys/arch/mipsco/mipsco/
H A Dlocore_machdep.S45 mtc0 zero, MIPS_COP_0_STATUS # Disable interrupts
/netbsd-6-1-5-RELEASE/sys/arch/mips/mips/
H A Dspl.S86 or v1, MIPS_INT_MASK # enable all interrupts
89 mtc0 zero, MIPS_COP_0_STATUS ## disable interrupts
141 mtc0 zero, MIPS_COP_0_STATUS ## disable interrupts
176 mtc0 zero, MIPS_COP_0_STATUS ## disable interrupts
189 mtc0 zero, MIPS_COP_0_STATUS # disable interrupts (2 cycles)
196 mtc0 v1, MIPS_COP_0_STATUS # enable interrupts
202 mtc0 zero, MIPS_COP_0_STATUS # disable interrupts (2 cycles)
209 mtc0 v1, MIPS_COP_0_STATUS # enable interrupts
232 and a0, v1, MIPS_INT_MASK # select all interrupts
233 xor a0, v1 # clear all interrupts
[all...]
H A Dcache_r3k_subr.S73 mtc0 a0, MIPS_COP_0_STATUS # disable interrupts,
151 mtc0 zero, MIPS_COP_0_STATUS # Disable interrupts.
193 mtc0 zero, MIPS_COP_0_STATUS # Disable interrupts.
H A Dcache_tx39_subr.S57 mtc0 zero, MIPS_COP_0_STATUS # Disable interrupts.
104 mtc0 zero, MIPS_COP_0_STATUS # Disable interrupts.
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/ppc/
H A Dinterrupts.h27 The code below handles two different types of interrupts.
35 code it may occure to you that, for some interrupts, they could
54 /* Software generated interrupts.
127 /* Hardware generated interrupts:
129 These asynchronous hardware generated interrupts may be called at
130 any time. It is the responsibility of this (the interrupts) module
131 to ensure that interrupts are delivered correctly (when possible).
132 The delivery of these interrupts is controlled by the MSR's
143 `asserted'. While interrupts are disabled, the external interrupt
155 } interrupts; typedef in typeref:struct:_interrupts
[all...]
H A Dinterrupts.c38 interrupts */
447 interrupts *ints = cpu_interrupts(processor);
459 /* external interrupts have a high priority and remain pending */
467 /* decrementer interrupts have a lower priority and are once only */
486 interrupts *ints = cpu_interrupts(processor);
511 interrupts *ints = cpu_interrupts(processor);
523 interrupts *ints = cpu_interrupts(processor);
H A Dcpu.h31 #include "interrupts.h"
188 (interrupts *) cpu_interrupts
/netbsd-6-1-5-RELEASE/external/gpl3/binutils/dist/opcodes/
H A Dz8k-dis.c52 unsigned long interrupts; member in struct:__anon3877
438 instr_data->interrupts = instr_nibl & 0x3;
441 instr_data->interrupts = instr_nibl & 0x3;
476 print_intr(char *tmp_str, unsigned long interrupts) argument
481 if (! (interrupts & 2))
486 if (! (interrupts & 1))
575 print_intr (tmp_str, instr_data->interrupts);
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/opcodes/
H A Dz8k-dis.c52 unsigned long interrupts; member in struct:__anon1221
438 instr_data->interrupts = instr_nibl & 0x3;
441 instr_data->interrupts = instr_nibl & 0x3;
476 print_intr(char *tmp_str, unsigned long interrupts) argument
481 if (! (interrupts & 2))
486 if (! (interrupts & 1))
575 print_intr (tmp_str, instr_data->interrupts);
/netbsd-6-1-5-RELEASE/external/gpl3/gdb/dist/sim/frv/
H A DMakefile.in37 traps.o interrupts.o memory.o cache.o pipeline.o \
75 interrupts.o: interrupts.c $(FRVBF_INCLUDE_DEPS)
/netbsd-6-1-5-RELEASE/external/gpl3/gcc/dist/gcc/config/m68hc11/
H A Dm68hc11-crt0.S53 ;; At this step, the stack is not initialized and interrupts are masked.
/netbsd-6-1-5-RELEASE/gnu/dist/gcc4/gcc/config/m68hc11/
H A Dm68hc11-crt0.S65 ;; At this step, the stack is not initialized and interrupts are masked.
/netbsd-6-1-5-RELEASE/sys/arch/sun2/sun2/
H A Dlocore.s107 movw #PSL_HIGHIPL,%sr | no interrupts
134 | Disable interrupts, and initialize the soft copy of the
140 movsw %d0, SYSTEM_ENAB | disable all interrupts
167 | is finished, to avoid spurrious interrupts.
352 movw #PSL_HIGHIPL,%sr | lock out interrupts
437 | Handler for all vectored interrupts (i.e. VME interrupts)
479 * (profiling, scheduling) and software interrupts (network, softclock).
481 * the T_ASTFLT handling code will also check for software interrupts so we
483 * drop the IPL to allow device interrupts
[all...]
/netbsd-6-1-5-RELEASE/sys/arch/x68k/stand/loadbsd/
H A Dtrampoline.S19 oriw #0x0700,%sr | keep out interrupts
/netbsd-6-1-5-RELEASE/sys/arch/mips/rmi/
H A Drmixl_spl.S81 * on return, all interrupts are disabled by EIMR
115 dmtc0 zero, RMIXL_COP_0_EIMR ## disable all interrupts
136 dmtc0 zero, RMIXL_COP_0_EIMR ## disable all interrupts
146 dmtc0 zero, RMIXL_COP_0_EIMR ## disable all interrupts
162 dmtc0 zero, RMIXL_COP_0_EIMR ## disable all interrupts
178 dmtc0 zero, RMIXL_COP_0_EIMR ## disable all interrupts
200 dmtc0 zero, RMIXL_COP_0_EIMR ## disable all interrupts
206 ## interrupts remain disabled!
261 dmfc0 ta1, RMIXL_COP_0_EIRR # get active interrupts
/netbsd-6-1-5-RELEASE/sys/arch/sparc/sparc/
H A Dlock_stubs.s198 rd %psr, %o4 ! disable interrupts
223 wr %o4, 0, %psr ! enable interrupts
231 wr %o4, 0, %psr ! enable interrupts
/netbsd-6-1-5-RELEASE/sys/arch/arm/s3c2xx0/
H A Ds3c2800_pci.c640 /* clear all interrupts */
684 uint32_t interrupts, errors; local
686 interrupts = bus_space_read_4(iot, ioh, PCICTL_PCIINTST);
688 if (interrupts & PCIINT_INA) {
702 interrupts &= ~PCIINT_INA;
705 errors = interrupts & (PCIINT_SER | PCIINT_TPE | PCIINT_MPE |
719 /* acknowledge interrupts */
720 bus_space_write_4(iot, ioh, PCICTL_PCIINTST, interrupts);
/netbsd-6-1-5-RELEASE/sys/arch/sparc64/dev/
H A Dpci_machdep.c403 * XXX: how does this deal with multiple interrupts for a device?
409 int interrupts[4], *intp, int_used; local
413 intp = &interrupts[0];
414 len = prom_getproplen(node, "interrupts");
415 if (len > sizeof(interrupts)) {
417 ("pci_intr_map: too many available interrupts\n"));
420 if (prom_getprop(node, "interrupts", len,
423 ("pci_intr_map: could not read interrupts\n"));
428 int_used = interrupts[0];
462 /* panic("can't disestablish PCI interrupts ye
[all...]
/netbsd-6-1-5-RELEASE/sys/arch/vax/boot/common/
H A Dsrt0.S71 mtpr $0x1f,$0x12 # Block all interrupts

Completed in 509 milliseconds

123