1239462Sdim/* $NetBSD: pci_machdep.c,v 1.73 2011/07/01 18:48:36 dyoung Exp $ */ 2218885Sdim 3218885Sdim/* 4218885Sdim * Copyright (c) 1999, 2000 Matthew R. Green 5218885Sdim * All rights reserved. 6218885Sdim * 7218885Sdim * Redistribution and use in source and binary forms, with or without 8218885Sdim * modification, are permitted provided that the following conditions 9249423Sdim * are met: 10249423Sdim * 1. Redistributions of source code must retain the above copyright 11249423Sdim * notice, this list of conditions and the following disclaimer. 12249423Sdim * 2. Redistributions in binary form must reproduce the above copyright 13249423Sdim * notice, this list of conditions and the following disclaimer in the 14249423Sdim * documentation and/or other materials provided with the distribution. 15249423Sdim * 16249423Sdim * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17249423Sdim * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18249423Sdim * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19249423Sdim * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20249423Sdim * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21249423Sdim * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22249423Sdim * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23218885Sdim * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24218885Sdim * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25249423Sdim * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26249423Sdim * SUCH DAMAGE. 27218885Sdim */ 28249423Sdim 29249423Sdim/* 30218885Sdim * functions expected by the MI PCI code. 31218885Sdim */ 32218885Sdim 33218885Sdim#include <sys/cdefs.h> 34218885Sdim__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.73 2011/07/01 18:48:36 dyoung Exp $"); 35249423Sdim 36218885Sdim#include <sys/types.h> 37249423Sdim#include <sys/param.h> 38249423Sdim#include <sys/time.h> 39249423Sdim#include <sys/systm.h> 40249423Sdim#include <sys/errno.h> 41249423Sdim#include <sys/device.h> 42249423Sdim#include <sys/malloc.h> 43249423Sdim 44249423Sdim#define _SPARC_BUS_DMA_PRIVATE 45249423Sdim#include <sys/bus.h> 46249423Sdim#include <machine/autoconf.h> 47249423Sdim#include <machine/openfirm.h> 48249423Sdim#include <dev/pci/pcivar.h> 49218885Sdim#include <dev/pci/pcireg.h> 50249423Sdim 51249423Sdim#include <dev/ofw/ofw_pci.h> 52249423Sdim 53249423Sdim#include <sparc64/dev/iommureg.h> 54249423Sdim#include <sparc64/sparc64/cache.h> 55249423Sdim 56249423Sdim#include "locators.h" 57249423Sdim 58249423Sdim#ifdef DEBUG 59249423Sdim#define SPDB_CONF 0x01 60249423Sdim#define SPDB_INTR 0x04 61249423Sdim#define SPDB_INTMAP 0x08 62249423Sdim#define SPDB_PROBE 0x20 63218885Sdim#define SPDB_TAG 0x40 64249423Sdimint sparc_pci_debug = 0x0; 65249423Sdim#define DPRINTF(l, s) do { if (sparc_pci_debug & l) printf s; } while (0) 66218885Sdim#else 67249423Sdim#define DPRINTF(l, s) 68249423Sdim#endif 69249423Sdim 70249423Sdim/* this is a base to be copied */ 71249423Sdimstruct sparc_pci_chipset _sparc_pci_chipset = { 72218885Sdim .cookie = NULL, 73249423Sdim}; 74249423Sdim 75249423Sdimstatic pcitag_t 76249423Sdimofpci_make_tag(pci_chipset_tag_t pc, int node, int b, int d, int f) 77249423Sdim{ 78218885Sdim pcitag_t tag; 79249423Sdim pcireg_t reg; 80249423Sdim 81249423Sdim tag = PCITAG_CREATE(node, b, d, f); 82249423Sdim 83249423Sdim DPRINTF(SPDB_TAG, 84218885Sdim ("%s: creating tag for node %x bus %d dev %d fn %d\n", 85249423Sdim __func__, node, b, d, f)); 86249423Sdim 87218885Sdim /* Enable all the different spaces for this device */ 88249423Sdim reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 89249423Sdim reg |= PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_MASTER_ENABLE| 90218885Sdim PCI_COMMAND_IO_ENABLE; 91249423Sdim pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, reg); 92218885Sdim 93249423Sdim return (tag); 94218885Sdim} 95249423Sdim 96249423Sdim/* 97249423Sdim * functions provided to the MI code. 98249423Sdim */ 99249423Sdim 100249423Sdimvoid 101239462Sdimpci_attach_hook(struct device *parent, struct device *self, 102249423Sdim struct pcibus_attach_args *pba) 103249423Sdim{ 104249423Sdim} 105218885Sdim 106249423Sdimint 107249423Sdimpci_bus_maxdevs(pci_chipset_tag_t pc, int busno) 108249423Sdim{ 109249423Sdim 110249423Sdim return 32; 111218885Sdim} 112249423Sdim 113249423Sdimpcitag_t 114218885Sdimpci_make_tag(pci_chipset_tag_t pc, int b, int d, int f) 115249423Sdim{ 116249423Sdim struct ofw_pci_register reg; 117249423Sdim pcitag_t tag; 118249423Sdim int (*valid)(void *); 119218885Sdim int node, len; 120249423Sdim#ifdef DEBUG 121218885Sdim char name[80]; 122249423Sdim memset(name, 0, sizeof(name)); 123249423Sdim#endif 124249423Sdim 125218885Sdim /* 126249423Sdim * Refer to the PCI/CardBus bus node first. 127249423Sdim * It returns a tag if node is present and bus is valid. 128218885Sdim */ 129249423Sdim if (0 <= b && b < 256) { 130234982Sdim KASSERT(pc->spc_busnode != NULL); 131249423Sdim node = (*pc->spc_busnode)[b].node; 132249423Sdim valid = (*pc->spc_busnode)[b].valid; 133249423Sdim if (node != 0 && d == 0 && 134239462Sdim (valid == NULL || (*valid)((*pc->spc_busnode)[b].arg))) 135249423Sdim return ofpci_make_tag(pc, node, b, d, f); 136249423Sdim } 137249423Sdim 138249423Sdim /* 139249423Sdim * Hunt for the node that corresponds to this device 140249423Sdim * 141249423Sdim * We could cache this info in an array in the parent 142249423Sdim * device... except then we have problems with devices 143249423Sdim * attached below pci-pci bridges, and we would need to 144249423Sdim * add special code to the pci-pci bridge to cache this 145249423Sdim * info. 146249423Sdim */ 147249423Sdim 148249423Sdim tag = PCITAG_CREATE(-1, b, d, f); 149249423Sdim node = pc->rootnode; 150249423Sdim /* 151249423Sdim * First make sure we're on the right bus. If our parent 152249423Sdim * has a bus-range property and we're not in the range, 153249423Sdim * then we're obviously on the wrong bus. So go up one 154249423Sdim * level. 155249423Sdim */ 156249423Sdim DPRINTF(SPDB_PROBE, ("curnode %x %s\n", node, 157249423Sdim prom_getpropstringA(node, "name", name, sizeof(name)))); 158249423Sdim#if 0 159249423Sdim while ((OF_getprop(OF_parent(node), "bus-range", (void *)&busrange, 160249423Sdim sizeof(busrange)) == sizeof(busrange)) && 161249423Sdim (b < busrange[0] || b > busrange[1])) { 162249423Sdim /* Out of range, go up one */ 163249423Sdim node = OF_parent(node); 164249423Sdim DPRINTF(SPDB_PROBE, printf("going up to node %x %s\n", 165249423Sdim node, 166249423Sdim prom_getpropstringA(node, "name", name, sizeof(name)))); 167249423Sdim } 168249423Sdim#endif 169249423Sdim node = prom_firstchild(node); 170249423Sdim /* 171249423Sdim * Now traverse all peers until we find the node or we find 172249423Sdim * the right bridge. 173249423Sdim * 174249423Sdim * XXX We go up one and down one to make sure nobody's missed. 175249423Sdim * but this should not be necessary. 176249423Sdim */ 177249423Sdim for (node = ((node)); node; node = prom_nextsibling(node)) { 178249423Sdim 179249423Sdim DPRINTF(SPDB_PROBE, ("checking node %x %s\n", node, 180249423Sdim prom_getpropstringA(node, "name", name, sizeof(name)))); 181249423Sdim 182249423Sdim#if 1 183249423Sdim /* 184249423Sdim * Check for PCI-PCI bridges. If the device we want is 185249423Sdim * in the bus-range for that bridge, work our way down. 186249423Sdim */ 187249423Sdim while (1) { 188249423Sdim int busrange[2], *brp; 189249423Sdim len = 2; 190249423Sdim brp = busrange; 191249423Sdim if (prom_getprop(node, "bus-range", sizeof(*brp), 192249423Sdim &len, &brp) != 0) 193249423Sdim break; 194249423Sdim if (len != 2 || b < busrange[0] || b > busrange[1]) 195249423Sdim break; 196249423Sdim /* Go down 1 level */ 197249423Sdim node = prom_firstchild(node); 198249423Sdim DPRINTF(SPDB_PROBE, ("going down to node %x %s\n", node, 199249423Sdim prom_getpropstringA(node, "name", name, 200249423Sdim sizeof(name)))); 201249423Sdim } 202249423Sdim#endif /*1*/ 203249423Sdim /* 204249423Sdim * We only really need the first `reg' property. 205249423Sdim * 206249423Sdim * For simplicity, we'll query the `reg' when we 207249423Sdim * need it. Otherwise we could malloc() it, but 208249423Sdim * that gets more complicated. 209249423Sdim */ 210249423Sdim len = prom_getproplen(node, "reg"); 211249423Sdim if (len < sizeof(reg)) 212249423Sdim continue; 213249423Sdim if (OF_getprop(node, "reg", (void *)®, sizeof(reg)) != len) 214249423Sdim panic("pci_probe_bus: OF_getprop len botch"); 215249423Sdim 216249423Sdim if (b != OFW_PCI_PHYS_HI_BUS(reg.phys_hi)) 217249423Sdim continue; 218249423Sdim if (d != OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi)) 219249423Sdim continue; 220249423Sdim if (f != OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi)) 221249423Sdim continue; 222249423Sdim 223249423Sdim /* Got a match */ 224249423Sdim tag = ofpci_make_tag(pc, node, b, d, f); 225249423Sdim 226249423Sdim return (tag); 227249423Sdim } 228249423Sdim /* No device found -- return a dead tag */ 229249423Sdim return (tag); 230249423Sdim} 231249423Sdim 232249423Sdimvoid 233249423Sdimpci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, int *fp) 234249423Sdim{ 235249423Sdim 236249423Sdim if (bp != NULL) 237249423Sdim *bp = PCITAG_BUS(tag); 238249423Sdim if (dp != NULL) 239249423Sdim *dp = PCITAG_DEV(tag); 240249423Sdim if (fp != NULL) 241249423Sdim *fp = PCITAG_FUN(tag); 242249423Sdim} 243249423Sdim 244249423Sdimint 245249423Sdimsparc64_pci_enumerate_bus(struct pci_softc *sc, const int *locators, 246249423Sdim int (*match)(const struct pci_attach_args *), struct pci_attach_args *pap) 247249423Sdim{ 248249423Sdim struct ofw_pci_register reg; 249218885Sdim pci_chipset_tag_t pc = sc->sc_pc; 250218885Sdim pcitag_t tag; 251218885Sdim pcireg_t class, csr, bhlc, ic; 252218885Sdim int node, b, d, f, ret; 253 int bus_frequency, lt, cl, cacheline; 254 char name[30]; 255#if 0 256 extern int pci_config_dump; 257#endif 258 259 if (sc->sc_bridgetag) 260 node = PCITAG_NODE(*sc->sc_bridgetag); 261 else 262 node = pc->rootnode; 263 264 bus_frequency = 265 prom_getpropint(node, "clock-frequency", 33000000) / 1000000; 266 267 /* 268 * Make sure the cache line size is at least as big as the 269 * ecache line and the streaming cache (64 byte). 270 */ 271 cacheline = max(ecache_min_line_size, 64); 272 KASSERT((cacheline/64)*64 == cacheline && 273 (cacheline/ecache_min_line_size)*ecache_min_line_size == cacheline && 274 (cacheline/4)*4 == cacheline); 275 276#if 0 277 /* 278 * XXX this faults on Fire PCIe controllers. 279 * XXX move into the psycho and schizo driver front ends. 280 */ 281 /* Turn on parity for the bus. */ 282 tag = ofpci_make_tag(pc, node, sc->sc_bus, 0, 0); 283 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 284 csr |= PCI_COMMAND_PARITY_ENABLE; 285 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 286 287 /* 288 * Initialize the latency timer register. 289 * The value 0x40 is from Solaris. 290 */ 291 bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG); 292 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 293 bhlc |= 0x40 << PCI_LATTIMER_SHIFT; 294 pci_conf_write(pc, tag, PCI_BHLC_REG, bhlc); 295 296 if (pci_config_dump) 297 pci_conf_print(pc, tag, NULL); 298#endif 299 300 for (node = prom_firstchild(node); node != 0 && node != -1; 301 node = prom_nextsibling(node)) { 302 name[0] = name[29] = 0; 303 prom_getpropstringA(node, "name", name, sizeof(name)); 304 305 if (OF_getprop(node, "class-code", &class, sizeof(class)) != 306 sizeof(class)) 307 continue; 308 if (OF_getprop(node, "reg", ®, sizeof(reg)) < sizeof(reg)) 309 panic("pci_enumerate_bus: \"%s\" regs too small", name); 310 311 b = OFW_PCI_PHYS_HI_BUS(reg.phys_hi); 312 d = OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi); 313 f = OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi); 314 315 if (sc->sc_bus != b) { 316 aprint_error_dev(sc->sc_dev, "WARNING: incorrect " 317 "bus # for \"%s\" (%d/%d/%d)\n", name, b, d, f); 318 continue; 319 } 320 if ((locators[PCICF_DEV] != PCICF_DEV_DEFAULT) && 321 (locators[PCICF_DEV] != d)) 322 continue; 323 if ((locators[PCICF_FUNCTION] != PCICF_FUNCTION_DEFAULT) && 324 (locators[PCICF_FUNCTION] != f)) 325 continue; 326 327 tag = ofpci_make_tag(pc, node, b, d, f); 328 329 /* 330 * Turn on parity and fast-back-to-back for the device. 331 */ 332 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 333 if (csr & PCI_STATUS_BACKTOBACK_SUPPORT) 334 csr |= PCI_COMMAND_BACKTOBACK_ENABLE; 335 csr |= PCI_COMMAND_PARITY_ENABLE; 336 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 337 338 /* 339 * Initialize the latency timer register for busmaster 340 * devices to work properly. 341 * latency-timer = min-grant * bus-freq / 4 (from FreeBSD) 342 * Also initialize the cache line size register. 343 * Solaris anytime sets this register to the value 0x10. 344 */ 345 bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG); 346 ic = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 347 348 lt = min(PCI_MIN_GNT(ic) * bus_frequency / 4, 255); 349 if (lt == 0 || lt < PCI_LATTIMER(bhlc)) 350 lt = PCI_LATTIMER(bhlc); 351 352 cl = PCI_CACHELINE(bhlc); 353 if (cl == 0) 354 cl = cacheline; 355 356 bhlc &= ~((PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT) | 357 (PCI_CACHELINE_MASK << PCI_CACHELINE_SHIFT)); 358 bhlc |= (lt << PCI_LATTIMER_SHIFT) | 359 (cl << PCI_CACHELINE_SHIFT); 360 pci_conf_write(pc, tag, PCI_BHLC_REG, bhlc); 361 362 ret = pci_probe_device(sc, tag, match, pap); 363 if (match != NULL && ret != 0) 364 return (ret); 365 } 366 return (0); 367} 368 369const char * 370pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih) 371{ 372 static char str[16]; 373 374 sprintf(str, "ivec %x", ih); 375 DPRINTF(SPDB_INTR, ("pci_intr_string: returning %s\n", str)); 376 377 return (str); 378} 379 380const struct evcnt * 381pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih) 382{ 383 384 /* XXX for now, no evcnt parent reported */ 385 return NULL; 386} 387 388int 389pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ih, 390 int attr, uint64_t data) 391{ 392 393 switch (attr) { 394 case PCI_INTR_MPSAFE: 395 return 0; 396 default: 397 return ENODEV; 398 } 399} 400 401/* 402 * interrupt mapping foo. 403 * XXX: how does this deal with multiple interrupts for a device? 404 */ 405int 406pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 407{ 408 pcitag_t tag = pa->pa_tag; 409 int interrupts[4], *intp, int_used; 410 int len, node = PCITAG_NODE(tag); 411 char devtype[30]; 412 413 intp = &interrupts[0]; 414 len = prom_getproplen(node, "interrupts"); 415 if (len > sizeof(interrupts)) { 416 DPRINTF(SPDB_INTMAP, 417 ("pci_intr_map: too many available interrupts\n")); 418 return (ENODEV); 419 } 420 if (prom_getprop(node, "interrupts", len, 421 &len, &intp) != 0 || len != 1) { 422 DPRINTF(SPDB_INTMAP, 423 ("pci_intr_map: could not read interrupts\n")); 424 return (ENODEV); 425 } 426 427 /* XXX We pick the first interrupt, but should do better */ 428 int_used = interrupts[0]; 429 if (OF_mapintr(node, &int_used, sizeof(int_used), 430 sizeof(int_used)) < 0) { 431 printf("OF_mapintr failed\n"); 432 if (pa->pa_pc->spc_find_ino) 433 pa->pa_pc->spc_find_ino(pa, &int_used); 434 } 435 DPRINTF(SPDB_INTMAP, ("OF_mapintr() gave %x\n", int_used)); 436 437 /* Try to find an IPL for this type of device. */ 438 prom_getpropstringA(node, "device_type", devtype, sizeof(devtype)); 439 for (len = 0; intrmap[len].in_class != NULL; len++) 440 if (strcmp(intrmap[len].in_class, devtype) == 0) { 441 int_used |= INTLEVENCODE(intrmap[len].in_lev); 442 DPRINTF(SPDB_INTMAP, ("reset to %x\n", int_used)); 443 break; 444 } 445 446 *ihp = int_used; 447 448 /* Call the sub-driver is necessary */ 449 if (pa->pa_pc->spc_intr_map) 450 (*pa->pa_pc->spc_intr_map)(pa, ihp); 451 452 return (0); 453} 454 455void 456pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie) 457{ 458 459 DPRINTF(SPDB_INTR, ("pci_intr_disestablish: cookie %p\n", cookie)); 460 461 /* XXX */ 462 /* panic("can't disestablish PCI interrupts yet"); */ 463} 464 465int 466sparc_pci_childspace(int type) 467{ 468 int ss; 469 470 switch (type) { 471 case PCI_CONFIG_BUS_SPACE: 472 ss = 0x00; 473 break; 474 case PCI_IO_BUS_SPACE: 475 ss = 0x01; 476 break; 477 case PCI_MEMORY_BUS_SPACE: 478 ss = 0x02; 479 break; 480#if 0 481 /* we don't do 64 bit memory space */ 482 case PCI_MEMORY64_BUS_SPACE: 483 ss = 0x03; 484 break; 485#endif 486 default: 487 panic("get_childspace: unknown bus type: %d", type); 488 } 489 490 return (ss); 491} 492