Searched refs:fp_class (Results 1 - 25 of 30) sorted by relevance

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/netbsd-6-1-5-RELEASE/sys/arch/m68k/fpe/
H A Dfpu_getexp.c48 if (fp->fp_class == FPC_INF) {
51 } else if (fp->fp_class == FPC_NUM) { /* a number */
54 } else if (fp->fp_class == FPC_SNAN) { /* signaling NaN */
67 if (fp->fp_class == FPC_INF) {
70 } else if (fp->fp_class == FPC_NUM) { /* a number */
72 } else if (fp->fp_class == FPC_SNAN) { /* signaling NaN */
H A Dfpu_int.c49 if (x->fp_class != FPC_NUM) {
54 x->fp_class = FPC_ZERO;
84 if (x->fp_class != FPC_NUM) {
H A Dfpu_emulate.h80 int fp_class; /* see below */ member in struct:fpn
115 #define ISNAN(fp) ((fp)->fp_class < 0)
116 #define ISZERO(fp) ((fp)->fp_class == 0)
117 #define ISINF(fp) ((fp)->fp_class == FPC_INF)
135 if ((u_int)(x)->fp_class > (u_int)(y)->fp_class) \
H A Dfpu_div.c183 if (x->fp_class == y->fp_class)
191 x->fp_class = FPC_ZERO;
196 x->fp_class = FPC_INF;
H A Dfpu_subr.c71 if (rsh < 0 || (fp->fp_class != FPC_NUM && !ISNAN(fp)))
90 fp->fp_class = FPC_ZERO;
155 fp->fp_class = FPC_ZERO;
206 fp->fp_class = FPC_QNAN;
H A Dfpu_add.c113 r->fp_class = FPC_NUM;
179 r->fp_class = FPC_ZERO;
H A Dfpu_emulate.c296 switch (fp->fp_class) {
502 if (x->fp_class < 0 || y->fp_class < 0) {
504 x->fp_class =
505 (y->fp_class < x->fp_class) ? y->fp_class : x->fp_class;
506 } else if (x->fp_class == FPC_INF) {
507 if (y->fp_class
[all...]
H A Dfpu_log.c302 F.fp_class = FPC_NUM;
333 fe->fe_f2.fp_class = FPC_NUM;
439 fe->fe_f2.fp_class = FPC_NUM;
484 if (fp->fp_class >= FPC_NUM) {
488 } else if (fp->fp_class == FPC_NUM) {
496 } else if (fp->fp_class == FPC_ZERO) {
498 fp->fp_class = FPC_INF;
501 } else if (fp->fp_class == FPC_SNAN) {
521 if (fp->fp_class >= FPC_NUM) {
525 } else if (fp->fp_class
[all...]
H A Dfpu_fstore.c119 class_name[fe->fe_f3.fp_class + 2],
H A Dfpu_fscale.c180 fe->fe_f2.fp_class = (buf[0] == 0) ? FPC_ZERO : FPC_NUM;
195 switch (fe->fe_f2.fp_class) {
H A Dfpu_rem.c215 fe->fe_f1.fp_class = FPC_ZERO;
/netbsd-6-1-5-RELEASE/sys/arch/powerpc/fpu/
H A Dfpu_emu.h79 int fp_class; /* see below */ member in struct:fpn
106 #define ISSNAN(fp) ((fp)->fp_class == FPC_SNAN)
107 #define ISQNAN(fp) ((fp)->fp_class == FPC_QNAN)
108 #define ISNAN(fp) ((fp)->fp_class < 0)
109 #define ISZERO(fp) ((fp)->fp_class == 0)
110 #define ISINF(fp) ((fp)->fp_class == FPC_INF)
128 if ((u_int)(x)->fp_class > (u_int)(y)->fp_class) \
H A Dfpu_compare.c68 * We already arranged for fp_class(Inf) > fp_class(numbers) > fp_class(0),
139 if (a->fp_class < b->fp_class) { /* |a| < |b| */
143 if (a->fp_class > b->fp_class) { /* |a| > |b| */
H A Dfpu_div.c195 if (x->fp_class == y->fp_class) {
204 if (x->fp_class == y->fp_class) {
215 x->fp_class = FPC_ZERO;
221 x->fp_class = FPC_INF;
H A Dfpu_subr.c76 if (rsh <= 0 || (fp->fp_class != FPC_NUM && !ISNAN(fp)))
97 fp->fp_class = FPC_ZERO;
164 fp->fp_class = FPC_ZERO;
218 fp->fp_class = FPC_QNAN;
H A Dfpu_add.c131 r->fp_class = FPC_NUM;
199 r->fp_class = FPC_ZERO;
H A Dfpu_explode.c254 fp->fp_class = s;
H A Dfpu_implode.c205 switch (fp->fp_class) {
252 switch (fp->fp_class) {
H A Dfpu_sqrt.c224 x->fp_class = FPC_INF;
/netbsd-6-1-5-RELEASE/sys/arch/sparc/fpu/
H A Dfpu_compare.c67 * We already arranged for fp_class(Inf) > fp_class(numbers) > fp_class(0),
134 if (a->fp_class < b->fp_class) { /* |a| < |b| */
138 if (a->fp_class > b->fp_class) { /* |a| > |b| */
152 if (a->fp_class == FPC_ZERO)
H A Dfpu_emu.h83 int fp_class; /* see below */ member in struct:fpn
110 #define ISNAN(fp) ((fp)->fp_class < 0)
111 #define ISZERO(fp) ((fp)->fp_class == 0)
112 #define ISINF(fp) ((fp)->fp_class == FPC_INF)
130 if ((u_int)(x)->fp_class > (u_int)(y)->fp_class) \
H A Dfpu_div.c181 if (x->fp_class == y->fp_class)
189 x->fp_class = FPC_ZERO;
194 x->fp_class = FPC_INF;
H A Dfpu_subr.c75 if (rsh <= 0 || (fp->fp_class != FPC_NUM && !ISNAN(fp)))
96 fp->fp_class = FPC_ZERO;
163 fp->fp_class = FPC_ZERO;
217 fp->fp_class = FPC_QNAN;
H A Dfpu_add.c117 r->fp_class = FPC_NUM;
185 r->fp_class = FPC_ZERO;
H A Dfpu_implode.c203 switch (fp->fp_class) {
251 switch (fp->fp_class) {

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