Searched refs:opc (Results 1 - 25 of 65) sorted by relevance

123

/macosx-10.9.5/JavaScriptCore-7537.78.1/assembler/
H A DSH4Assembler.h229 inline uint16_t getOpcodeGroup1(uint16_t opc, int rm, int rn) argument
231 return (opc | ((rm & 0xf) << 8) | ((rn & 0xf) << 4));
234 inline uint16_t getOpcodeGroup2(uint16_t opc, int rm) argument
236 return (opc | ((rm & 0xf) << 8));
239 inline uint16_t getOpcodeGroup3(uint16_t opc, int rm, int rn) argument
241 return (opc | ((rm & 0xf) << 8) | (rn & 0xff));
244 inline uint16_t getOpcodeGroup4(uint16_t opc, int rm, int rn, int offset) argument
246 return (opc | ((rm & 0xf) << 8) | ((rn & 0xf) << 4) | (offset & 0xf));
249 inline uint16_t getOpcodeGroup5(uint16_t opc, int rm) argument
251 return (opc | (r
254 getOpcodeGroup6(uint16_t opc, int rm) argument
259 getOpcodeGroup7(uint16_t opc, int rm) argument
264 getOpcodeGroup8(uint16_t opc, int rm, int rn) argument
269 getOpcodeGroup9(uint16_t opc, int rm, int rn) argument
274 getOpcodeGroup10(uint16_t opc, int rm, int rn) argument
279 getOpcodeGroup11(uint16_t opc, int rm, int rn) argument
419 uint16_t opc = getOpcodeGroup2(MOVT_OPCODE, dst); local
427 uint16_t opc = getOpcodeGroup1(ADD_OPCODE, dst, src); local
433 uint16_t opc = getOpcodeGroup1(ADDC_OPCODE, dst, src); local
439 uint16_t opc = getOpcodeGroup1(ADDV_OPCODE, dst, src); local
447 uint16_t opc = getOpcodeGroup3(ADDIMM_OPCODE, dst, imm8); local
453 uint16_t opc = getOpcodeGroup1(AND_OPCODE, dst, src); local
462 uint16_t opc = getOpcodeGroup5(ANDIMM_OPCODE, imm8); local
468 uint16_t opc = getOpcodeGroup1(DIV1_OPCODE, dst, src); local
474 uint16_t opc = getOpcodeGroup1(DIV0_OPCODE, dst, src); local
480 uint16_t opc = getOpcodeGroup1(NOT_OPCODE, dst, src); local
486 uint16_t opc = getOpcodeGroup1(OR_OPCODE, dst, src); local
495 uint16_t opc = getOpcodeGroup5(ORIMM_OPCODE, imm8); local
501 uint16_t opc = getOpcodeGroup1(SUB_OPCODE, dst, src); local
507 uint16_t opc = getOpcodeGroup1(SUBV_OPCODE, dst, src); local
513 uint16_t opc = getOpcodeGroup1(XOR_OPCODE, dst, src); local
522 uint16_t opc = getOpcodeGroup5(XORIMM_OPCODE, imm8); local
548 uint16_t opc = getOpcodeGroup1(NEG_OPCODE, dst, src); local
606 uint16_t opc = getOpcodeGroup1(MULL_OPCODE, dst, src); local
612 uint16_t opc = getOpcodeGroup1(DMULL_L_OPCODE, dst, src); local
618 uint16_t opc = getOpcodeGroup1(DMULSL_OPCODE, dst, src); local
624 uint16_t opc = getOpcodeGroup2(STSMACL_OPCODE, reg); local
630 uint16_t opc = getOpcodeGroup2(STSMACH_OPCODE, reg); local
676 uint16_t opc = getOpcodeGroup2(CMPPL_OPCODE, reg); local
682 uint16_t opc = getOpcodeGroup2(CMPPZ_OPCODE, reg); local
688 uint16_t opc = getOpcodeGroup5(CMPEQIMM_OPCODE, imm); local
694 uint16_t opc = getOpcodeGroup1(TST_OPCODE, dst, src); local
702 uint16_t opc = getOpcodeGroup5(TSTIMM_OPCODE, imm); local
731 branch(uint16_t opc, int label) argument
751 branch(uint16_t opc, RegisterID reg) argument
773 uint16_t opc = getOpcodeGroup2(LDSPR_OPCODE, reg); local
779 uint16_t opc = getOpcodeGroup2(STSPR_OPCODE, reg); local
785 uint16_t opc = getOpcodeGroup1(EXTUB_OPCODE, dst, src); local
791 uint16_t opc = getOpcodeGroup1(EXTUW_OPCODE, dst, src); local
799 uint16_t opc = getOpcodeGroup2(LDS_RM_FPUL_OPCODE, src); local
805 uint16_t opc = getOpcodeGroup2(FNEG_OPCODE, dst); local
811 uint16_t opc = getOpcodeGroup2(FSQRT_OPCODE, dst); local
817 uint16_t opc = getOpcodeGroup2(STS_FPUL_RN_OPCODE, src); local
823 uint16_t opc = getOpcodeGroup2(FLOAT_OPCODE, src); local
829 uint16_t opc = getOpcodeGroup1(FMUL_OPCODE, dst, src); local
835 uint16_t opc = getOpcodeGroup1(FMOV_OPCODE, dst, src); local
841 uint16_t opc = getOpcodeGroup1(FMOVS_READ_RM_OPCODE, dst, src); local
847 uint16_t opc = getOpcodeGroup1(FMOVS_WRITE_RN_OPCODE, dst, src); local
853 uint16_t opc = getOpcodeGroup1(FMOVS_WRITE_R0RN_OPCODE, dst, src); local
859 uint16_t opc = getOpcodeGroup1(FMOVS_READ_R0RM_OPCODE, dst, src); local
865 uint16_t opc = getOpcodeGroup1(FMOVS_READ_RM_INC_OPCODE, dst, src); local
871 uint16_t opc = getOpcodeGroup1(FMOVS_WRITE_RN_DEC_OPCODE, dst, src); local
877 uint16_t opc = getOpcodeGroup2(FTRC_OPCODE, src); local
883 uint16_t opc = getOpcodeGroup2(FLDS_FRM_FPUL_OPCODE, src); local
889 uint16_t opc = getOpcodeGroup2(FSTS_FPUL_FRN_OPCODE, src); local
895 uint16_t opc = getOpcodeGroup2(LDSFPSCR_OPCODE, reg); local
901 uint16_t opc = getOpcodeGroup2(STSFPSCR_OPCODE, reg); local
909 uint16_t opc = getOpcodeGroup7(FCNVDS_DRM_FPUL_OPCODE, src >> 1); local
915 uint16_t opc = getOpcodeGroup7(FCNVSD_FPUL_DRN_OPCODE, dst >> 1); local
921 uint16_t opc = getOpcodeGroup8(FCMPEQ_OPCODE, dst >> 1, src >> 1); local
927 uint16_t opc = getOpcodeGroup8(FCMPGT_OPCODE, dst >> 1, src >> 1); local
933 uint16_t opc = getOpcodeGroup8(FMUL_OPCODE, dst >> 1, src >> 1); local
939 uint16_t opc = getOpcodeGroup8(FSUB_OPCODE, dst >> 1, src >> 1); local
945 uint16_t opc = getOpcodeGroup8(FADD_OPCODE, dst >> 1, src >> 1); local
951 uint16_t opc = getOpcodeGroup8(FMOV_OPCODE, dst >> 1, src >> 1); local
957 uint16_t opc = getOpcodeGroup8(FDIV_OPCODE, dst >> 1, src >> 1); local
963 uint16_t opc = getOpcodeGroup7(FABS_OPCODE, dst >> 1); local
969 uint16_t opc = getOpcodeGroup7(FSQRT_OPCODE, dst >> 1); local
975 uint16_t opc = getOpcodeGroup7(FNEG_OPCODE, dst >> 1); local
981 uint16_t opc = getOpcodeGroup10(FMOVS_READ_RM_OPCODE, dst >> 1, src); local
987 uint16_t opc = getOpcodeGroup9(FMOVS_WRITE_RN_OPCODE, dst, src >> 1); local
993 uint16_t opc = getOpcodeGroup9(FMOVS_WRITE_R0RN_OPCODE, dst, src >> 1); local
999 uint16_t opc = getOpcodeGroup10(FMOVS_READ_R0RM_OPCODE, dst >> 1, src); local
1005 uint16_t opc = getOpcodeGroup10(FMOVS_READ_RM_INC_OPCODE, dst >> 1, src); local
1011 uint16_t opc = getOpcodeGroup9(FMOVS_WRITE_RN_DEC_OPCODE, dst, src >> 1); local
1017 uint16_t opc = getOpcodeGroup7(FLOAT_OPCODE, src >> 1); local
1023 uint16_t opc = getOpcodeGroup7(FTRC_OPCODE, src >> 1); local
1033 uint16_t opc = getOpcodeGroup3(MOVIMM_OPCODE, dst, imm8); local
1039 uint16_t opc = getOpcodeGroup1(MOV_OPCODE, dst, src); local
1045 uint16_t opc = getOpcodeGroup1(MOVW_WRITE_RN_OPCODE, dst, src); local
1051 uint16_t opc = getOpcodeGroup1(MOVW_READ_RM_OPCODE, dst, src); local
1057 uint16_t opc = getOpcodeGroup1(MOVW_READ_RMINC_OPCODE, dst, base); local
1066 uint16_t opc = getOpcodeGroup3(MOVW_READ_OFFPC_OPCODE, dst, offset); local
1074 uint16_t opc = getOpcodeGroup11(MOVW_READ_OFFRM_OPCODE, base, offset); local
1080 uint16_t opc = getOpcodeGroup1(MOVW_READ_R0RM_OPCODE, dst, src); local
1086 uint16_t opc = getOpcodeGroup1(MOVW_WRITE_R0RN_OPCODE, dst, src); local
1104 uint16_t opc = getOpcodeGroup1(MOVL_WRITE_RN_OPCODE, base, src); local
1132 uint16_t opc = getOpcodeGroup1(MOVB_WRITE_RN_OPCODE, base, src); local
1140 uint16_t opc = getOpcodeGroup11(MOVB_READ_OFFRM_OPCODE, base, offset); local
1146 uint16_t opc = getOpcodeGroup1(MOVB_READ_R0RM_OPCODE, dst, src); local
1152 uint16_t opc = getOpcodeGroup1(MOVB_READ_RM_OPCODE, dst, src); local
1158 uint16_t opc = getOpcodeGroup1(MOVB_READ_RMINC_OPCODE, dst, base); local
1164 uint16_t opc = getOpcodeGroup1(MOVB_WRITE_R0RN_OPCODE, dst, src); local
1170 uint16_t opc = getOpcodeGroup1(MOVL_READ_RM_OPCODE, dst, base); local
1176 uint16_t opc = getOpcodeGroup1(MOVL_READ_RMINC_OPCODE, dst, base); local
1182 uint16_t opc = getOpcodeGroup1(MOVL_READ_R0RM_OPCODE, dst, src); local
1188 uint16_t opc = getOpcodeGroup1(MOVL_WRITE_R0RN_OPCODE, dst, src); local
1196 uint16_t opc = getOpcodeGroup3(MOVIMM_OPCODE, dst, imm8); local
1207 uint16_t opc = getOpcodeGroup3(MOVIMM_OPCODE, dst, 0); local
1216 uint16_t opc = getOpcodeGroup3(MOVIMM_OPCODE, dst, 0); local
1703 printInstr(uint16_t opc, unsigned size, bool isdoubleInst = true) argument
2204 printInstr(uint16_t opc, unsigned size, bool isdoubleInst = true) argument
[all...]
/macosx-10.9.5/cxxfilt-11/cxxfilt/include/
H A Dxtensa-isa.h376 xtensa_insnbuf slotbuf, xtensa_opcode opc);
382 xtensa_opcode_name (xtensa_isa isa, xtensa_opcode opc);
402 xtensa_opcode_is_branch (xtensa_isa isa, xtensa_opcode opc);
405 xtensa_opcode_is_jump (xtensa_isa isa, xtensa_opcode opc);
408 xtensa_opcode_is_loop (xtensa_isa isa, xtensa_opcode opc);
411 xtensa_opcode_is_call (xtensa_isa isa, xtensa_opcode opc);
419 xtensa_opcode_num_operands (xtensa_isa isa, xtensa_opcode opc);
422 xtensa_opcode_num_stateOperands (xtensa_isa isa, xtensa_opcode opc);
425 xtensa_opcode_num_interfaceOperands (xtensa_isa isa, xtensa_opcode opc);
441 xtensa_opcode_num_funcUnit_uses (xtensa_isa isa, xtensa_opcode opc);
[all...]
/macosx-10.9.5/cxxfilt-11/cxxfilt/opcodes/
H A Dcgen.sh22 # Generate CGEN opcode files: arch-desc.[ch], arch-opc.[ch],
27 # arch-file opc-file options [extrafiles]
36 # OPC-FILE is the name of the .opc file (including path).
87 rm -f tmp-opc.h tmp-opc.h1
88 rm -f tmp-opc.c tmp-opc.c1
96 ${cgen} ${cgendir}/cgen-opc.scm \
105 -O tmp-opc.h1 \
106 -P tmp-opc
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H A DMakefile.am32 fr30-desc.h fr30-opc.h \
33 frv-desc.h frv-opc.h \
34 h8500-opc.h \
36 ia64-opc.h \
37 ip2k-desc.h ip2k-opc.h \
38 iq2000-desc.h iq2000-opc.h \
39 m32c-desc.h m32c-opc.h \
40 m32r-desc.h m32r-opc.h \
41 mcore-opc.h \
42 mep-desc.h mep-opc
[all...]
H A Dxtensa-dis.c77 xtensa_opcode opc,
93 (void) xtensa_operand_decode (isa, opc, opnd, &operand_val);
96 if (xtensa_operand_is_register (isa, opc, opnd) == 0)
98 if (xtensa_operand_is_PCrelative (isa, opc, opnd) == 1)
100 (void) xtensa_operand_undo_reloc (isa, opc, opnd,
116 xtensa_regfile opnd_rf = xtensa_operand_regfile (isa, opc, opnd);
120 while (i < xtensa_operand_num_regs (isa, opc, opnd))
141 xtensa_opcode opc; local
234 opc = xtensa_opcode_decode (isa, fmt, n, slot_buffer);
236 xtensa_opcode_name (isa, opc));
75 print_xtensa_operand(bfd_vma memaddr, struct disassemble_info *info, xtensa_opcode opc, int opnd, unsigned operand_val) argument
[all...]
H A Ddlx-dis.c37 unsigned char opc, rs1, rs2, rd; variable
150 if (r_opc[idx] != opc)
206 if (dlx_load_opcode[idx].opcode == opc)
208 if (opc == OPC (LHIOP))
250 if (dlx_store_opcode[idx].opcode == opc)
306 if (dlx_aluI_opcode[idx].opcode == opc)
340 if (dlx_br_opcode[idx].opcode == opc)
380 if (dlx_jmp_opcode[idx].opcode == opc)
417 if (dlx_jr_opcode[idx].opcode == opc)
462 opc
[all...]
H A Dmakefile.vms10 OBJS=alpha-dis.obj,alpha-opc.obj,dis-buf.obj,disassemble.obj
H A Dbfin-dis.c840 | 0 | 0 | 0 | 0 | 1 |.I.|.opc.......|.G.|.y.........|.x.........|
846 int opc = ((iw0 >> CCflag_opc_bits) & CCflag_opc_mask); local
848 if (opc == 0 && I == 0 && G == 0)
855 else if (opc == 1 && I == 0 && G == 0)
862 else if (opc == 2 && I == 0 && G == 0)
869 else if (opc == 3 && I == 0 && G == 0)
877 else if (opc == 4 && I == 0 && G == 0)
885 else if (opc == 0 && I == 1 && G == 0)
892 else if (opc == 1 && I == 1 && G == 0)
899 else if (opc
1174 int opc = ((iw0 >> ALU2op_opc_bits) & ALU2op_opc_mask); local
1289 int opc = ((iw0 >> PTR2op_opc_bits) & PTR2op_opc_mask); local
1358 int opc = ((iw0 >> LOGI2op_opc_bits) & LOGI2op_opc_mask); local
1432 int opc = ((iw0 >> COMP3op_opc_bits) & COMP3op_opc_mask); local
[all...]
H A Dia64-gen.c23 /* While the ia64-opc-* set of opcode tables are easy to maintain,
45 #include "ia64-opc.h"
46 #include "ia64-opc-a.c"
47 #include "ia64-opc-i.c"
48 #include "ia64-opc-m.c"
49 #include "ia64-opc-b.c"
50 #include "ia64-opc-f.c"
51 #include "ia64-opc-x.c"
52 #include "ia64-opc-d.c"
2451 insert_opcode_dependencies (opc, cm
[all...]
H A Dcgen-asm.in35 #include "@prefix@-opc.h"
68 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
75 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
H A Dm68k-dis.c1401 const struct m68k_opcode *opc = opcodes[major_opcode][i];
1402 unsigned long opcode = opc->opcode;
1403 unsigned long match = opc->match;
1414 && (opc->arch & arch_mask) != 0)
1419 for (d = opc->args; *d; d += 2)
1427 for (d = opc->args; *d; d += 2)
1435 for (d = opc->args; *d; d += 2)
1449 for (d = opc->args; *d; d += 2)
1461 if ((val = match_insn_m68k (memaddr, info, opc)))
1399 const struct m68k_opcode *opc = opcodes[major_opcode][i]; local
H A Dhppa-dis.c725 int opc = GET_FIELD (insn, 0, 5); local
727 if (opc == 0x16 || opc == 0x1e)
741 int opc = GET_FIELD (insn, 0, 5); local
743 if (opc == 0x13 || opc == 0x1b)
750 else if (opc == 0x17 || opc == 0x1f)
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/CellSPU/
H A DSPUInstrInfo.cpp33 unsigned opc = I->getOpcode(); local
35 return (opc == SPU::BR
36 || opc == SPU::BRA
37 || opc == SPU::BI);
42 unsigned opc = I->getOpcode(); local
44 return (opc == SPU::BRNZr32
45 || opc == SPU::BRNZv4i32
46 || opc == SPU::BRZr32
47 || opc == SPU::BRZv4i32
48 || opc
144 unsigned opc; local
177 unsigned opc; local
[all...]
/macosx-10.9.5/procmail-14/procmail/src/
H A Dregexp.h4 { unsigned opc;struct eps*next; member in struct:eps
H A Dregexp.c95 { spot->opc=OPC_EPS;spot->next=Ceps to;spot->spawn=0; /* epsilon transition */
115 { return epso(ep,(ep->opc&DONE_MASK)<OPC_EPS?
116 SZ(mchar):skplen[(ep->opc&DONE_MASK)-OPC_EPS]);
130 { r->opc=OPC_CLASS;r->next=Ceps e;Cc(r,pos1.st_)=Cc(r,pos2.st_)=0;
173 { r->opc=OPC_DOT;
181 { r->opc=e==opcfin?OPC_EOTEXT:OPC_BOTEXT;
188 { r->opc='\n';
196 r->opc=OPC_BOM;
210 { r->opc=case_ignore&&(unsigned)*p-'A'<='Z'-'A'?*p+'a'-'A':*p;
251 (r+1)->opc
[all...]
/macosx-10.9.5/cxxfilt-11/cxxfilt/bfd/
H A Dxtensa-isa.c695 xtensa_opcode opc;
702 opc = (intisa->slots[slot_id].opcode_decode_fn) (slotbuf);
703 if (opc != XTENSA_UNDEFINED)
704 return opc;
714 xtensa_insnbuf slotbuf, xtensa_opcode opc)
722 CHECK_OPCODE (intisa, opc, -1);
725 encode_fn = intisa->opcodes[opc].encode_fns[slot_id];
731 intisa->opcodes[opc].name, slot, intisa->formats[fmt].name);
740 xtensa_opcode_name (xtensa_isa isa, xtensa_opcode opc)
743 CHECK_OPCODE (intisa, opc, NUL
691 xtensa_opcode opc; local
709 xtensa_opcode_encode(xtensa_isa isa, xtensa_format fmt, int slot, xtensa_insnbuf slotbuf, xtensa_opcode opc) argument
736 xtensa_opcode_name(xtensa_isa isa, xtensa_opcode opc) argument
745 xtensa_opcode_is_branch(xtensa_isa isa, xtensa_opcode opc) argument
756 xtensa_opcode_is_jump(xtensa_isa isa, xtensa_opcode opc) argument
767 xtensa_opcode_is_loop(xtensa_isa isa, xtensa_opcode opc) argument
778 xtensa_opcode_is_call(xtensa_isa isa, xtensa_opcode opc) argument
789 xtensa_opcode_num_operands(xtensa_isa isa, xtensa_opcode opc) argument
801 xtensa_opcode_num_stateOperands(xtensa_isa isa, xtensa_opcode opc) argument
813 xtensa_opcode_num_interfaceOperands(xtensa_isa isa, xtensa_opcode opc) argument
825 xtensa_opcode_num_funcUnit_uses(xtensa_isa isa, xtensa_opcode opc) argument
834 xtensa_opcode_funcUnit_use(xtensa_isa isa, xtensa_opcode opc, int u) argument
868 get_operand(xtensa_isa_internal *intisa, xtensa_opcode opc, int opnd) argument
883 xtensa_operand_name(xtensa_isa isa, xtensa_opcode opc, int opnd) argument
895 xtensa_operand_is_visible(xtensa_isa isa, xtensa_opcode opc, int opnd) argument
921 xtensa_operand_inout(xtensa_isa isa, xtensa_opcode opc, int opnd) argument
943 xtensa_operand_get_field(xtensa_isa isa, xtensa_opcode opc, int opnd, xtensa_format fmt, int slot, const xtensa_insnbuf slotbuf, uint32 *valp) argument
980 xtensa_operand_set_field(xtensa_isa isa, xtensa_opcode opc, int opnd, xtensa_format fmt, int slot, xtensa_insnbuf slotbuf, uint32 val) argument
1017 xtensa_operand_encode(xtensa_isa isa, xtensa_opcode opc, int opnd, uint32 *valp) argument
1092 xtensa_operand_decode(xtensa_isa isa, xtensa_opcode opc, int opnd, uint32 *valp) argument
1116 xtensa_operand_is_register(xtensa_isa isa, xtensa_opcode opc, int opnd) argument
1131 xtensa_operand_regfile(xtensa_isa isa, xtensa_opcode opc, int opnd) argument
1144 xtensa_operand_num_regs(xtensa_isa isa, xtensa_opcode opc, int opnd) argument
1157 xtensa_operand_is_known_reg(xtensa_isa isa, xtensa_opcode opc, int opnd) argument
1172 xtensa_operand_is_PCrelative(xtensa_isa isa, xtensa_opcode opc, int opnd) argument
1187 xtensa_operand_do_reloc(xtensa_isa isa, xtensa_opcode opc, int opnd, uint32 *valp, uint32 pc) argument
1219 xtensa_operand_undo_reloc(xtensa_isa isa, xtensa_opcode opc, int opnd, uint32 *valp, uint32 pc) argument
1268 xtensa_stateOperand_state(xtensa_isa isa, xtensa_opcode opc, int stOp) argument
1283 xtensa_stateOperand_inout(xtensa_isa isa, xtensa_opcode opc, int stOp) argument
1316 xtensa_interfaceOperand_interface(xtensa_isa isa, xtensa_opcode opc, int ifOp) argument
[all...]
/macosx-10.9.5/JavaScriptCore-7537.78.1/disassembler/udis86/
H A Dud_optable.py35 opc = []
42 elif def_node.localName == 'opc':
43 opc = def_node.firstChild.data.split();
55 return ( pfx, opc, opr, ven )
86 def printFn( pfx, mnm, opc, opr, ven ):
91 ( mnm, ' '.join( opc ), ' '.join( opr ), ven )
/macosx-10.9.5/dtrace-118.1/libdwarf/
H A Dpro_line.c56 Dwarf_Ubyte opc,
96 Dwarf_Ubyte opc; local
99 opc = DW_LNE_set_address;
101 _dwarf_pro_add_line_entry(dbg, 0, offs, symidx, 0, 0, 0, 0, opc,
115 Dwarf_Ubyte opc; local
118 opc = DW_LNE_end_sequence;
121 opc, error);
140 Dwarf_Ubyte opc, Dwarf_Error * error)
166 dbg->de_last_line->dpl_opc = opc;
132 _dwarf_pro_add_line_entry(Dwarf_P_Debug dbg, Dwarf_Unsigned file_index, Dwarf_Addr code_address, Dwarf_Unsigned symidx, Dwarf_Unsigned line_no, Dwarf_Signed col_no, Dwarf_Bool is_stmt_begin, Dwarf_Bool is_bb_begin, Dwarf_Ubyte opc, Dwarf_Error * error) argument
H A Dpro_frame.c279 Dwarf_Ubyte opc, regno; local
292 opc = DW_CFA_offset;
298 opc = opc | regno; /* lower 6 bits are register number */
299 curinst->dfp_opcode = opc;
/macosx-10.9.5/cxxfilt-11/cxxfilt/include/opcode/
H A Dcgen.h608 to <arch>-opc.h, or add a hook. */
956 #define CGEN_OPCODE_HANDLERS(opc) (& (opc)->handlers)
960 #define CGEN_OPCODE_SYNTAX(opc) (& (opc)->syntax)
964 #define CGEN_OPCODE_FORMAT(opc) ((opc)->format)
965 #define CGEN_OPCODE_MASK_BITSIZE(opc) CGEN_IFMT_MASK_LENGTH (CGEN_OPCODE_FORMAT (opc))
966 #define CGEN_OPCODE_BITSIZE(opc) CGEN_IFMT_LENGT
[all...]
H A Di960.h60 #define REG_OPC(opc) ((opc & 0xff0) << 20) | ((opc & 0xf) << 7)
74 #define R_0(opc) ( REG_OPC(opc) | M1 | M2 | M3 ) /* No operands */
75 #define R_1(opc) ( REG_OPC(opc) | M2 | M3 ) /* 1 operand: src1 */
76 #define R_1D(opc) ( REG_OPC(opc) | M1 | M2 ) /* 1 operand: dst */
77 #define R_2(opc) ( REG_OP
[all...]
/macosx-10.9.5/OpenLDAP-491.1/OpenLDAP/servers/slapd/overlays/
H A Dsyncprov.c833 syncprov_sendresp( Operation *op, opcookie *opc, syncops *so, int mode ) argument
846 csns[0] = opc->sctxcsn;
862 a_uuid.a_nvals = &opc->suuid;
869 e_uuid = *opc->se;
875 if ( opc->sreference && so->s_op->o_managedsait <= SLAP_CONTROL_IGNORED ) {
888 e_uuid.e_name = opc->sdn;
889 e_uuid.e_nname = opc->sndn;
890 if ( opc->sreference && so->s_op->o_managedsait <= SLAP_CONTROL_IGNORED ) {
913 opcookie opc; local
916 opc
1030 syncprov_qresp( opcookie *opc, syncops *so, int mode ) argument
1165 syncprov_matchops( Operation *op, opcookie *opc, int saveit ) argument
1377 opcookie *opc = cb->sc_private; local
1497 opcookie *opc = op->o_callback->sc_private; local
1775 opcookie *opc = op->o_callback->sc_private; local
2038 opcookie *opc; local
2454 opcookie opc; local
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Hexagon/
H A DHexagonNewValueJump.cpp586 unsigned opc = getNewValueJumpOpcode(cmpInstr, cmpOp2, local
589 opc = QII->getInvertedPredicatedOpcode(opc);
611 QII->get(opc))
618 QII->get(opc))
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/MCTargetDesc/
H A DARMAsmBackend.cpp323 unsigned opc = 4; // bits {24-21}. Default to add: 0b0100 local
326 opc = 2; // 0b0010
331 return ARM_AM::getSOImmVal(Value) | (opc << 21);
336 unsigned opc = 0; local
339 opc = 5;
342 uint32_t out = (opc << 21);
/macosx-10.9.5/uucp-11/uucp/contrib/
H A Dxchat.c430 char *c, *cln, *opc, *cp; local
474 opc = strtok(c, CTL_DELIM);
475 if (opc == (char *)NULL) /* If no opcode... */
477 cp = opc;
504 if (strcmp(opc, sc_opdef[i].opname) == SAME)
508 logit ("Bad opcode in script", opc);
533 logit("Missing new state", opc);
557 logit("Missing script param", opc);
580 logit("Missing script param", opc);

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