1/* Print Motorola 68k instructions.
2   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3   1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
4   Free Software Foundation, Inc.
5
6   This file is free software; you can redistribute it and/or modify
7   it under the terms of the GNU General Public License as published by
8   the Free Software Foundation; either version 2 of the License, or
9   (at your option) any later version.
10
11   This program is distributed in the hope that it will be useful,
12   but WITHOUT ANY WARRANTY; without even the implied warranty of
13   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14   GNU General Public License for more details.
15
16   You should have received a copy of the GNU General Public License
17   along with this program; if not, write to the Free Software
18   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19   MA 02110-1301, USA.  */
20
21#include "sysdep.h"
22#include "dis-asm.h"
23#include "floatformat.h"
24#include "libiberty.h"
25#include "opintl.h"
26
27#include "opcode/m68k.h"
28
29/* Local function prototypes.  */
30
31const char * const fpcr_names[] =
32{
33  "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
34  "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
35};
36
37static char *const reg_names[] =
38{
39  "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
40  "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
41  "%ps", "%pc"
42};
43
44/* Name of register halves for MAC/EMAC.
45   Seperate from reg_names since 'spu', 'fpl' look weird.  */
46static char *const reg_half_names[] =
47{
48  "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
49  "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
50  "%ps", "%pc"
51};
52
53/* Sign-extend an (unsigned char).  */
54#if __STDC__ == 1
55#define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
56#else
57#define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
58#endif
59
60/* Get a 1 byte signed integer.  */
61#define NEXTBYTE(p)  (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1]))
62
63/* Get a 2 byte signed integer.  */
64#define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
65#define NEXTWORD(p)  \
66  (p += 2, FETCH_DATA (info, p), \
67   COERCE16 ((p[-2] << 8) + p[-1]))
68
69/* Get a 4 byte signed integer.  */
70#define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
71#define NEXTLONG(p)  \
72  (p += 4, FETCH_DATA (info, p), \
73   (COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])))
74
75/* Get a 4 byte unsigned integer.  */
76#define NEXTULONG(p)  \
77  (p += 4, FETCH_DATA (info, p), \
78   (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]))
79
80/* Get a single precision float.  */
81#define NEXTSINGLE(val, p) \
82  (p += 4, FETCH_DATA (info, p), \
83   floatformat_to_double (&floatformat_ieee_single_big, (char *) p - 4, &val))
84
85/* Get a double precision float.  */
86#define NEXTDOUBLE(val, p) \
87  (p += 8, FETCH_DATA (info, p), \
88   floatformat_to_double (&floatformat_ieee_double_big, (char *) p - 8, &val))
89
90/* Get an extended precision float.  */
91#define NEXTEXTEND(val, p) \
92  (p += 12, FETCH_DATA (info, p), \
93   floatformat_to_double (&floatformat_m68881_ext, (char *) p - 12, &val))
94
95/* Need a function to convert from packed to double
96   precision.   Actually, it's easier to print a
97   packed number than a double anyway, so maybe
98   there should be a special case to handle this... */
99#define NEXTPACKED(p) \
100  (p += 12, FETCH_DATA (info, p), 0.0)
101
102/* Maximum length of an instruction.  */
103#define MAXLEN 22
104
105#include <setjmp.h>
106
107struct private
108{
109  /* Points to first byte not fetched.  */
110  bfd_byte *max_fetched;
111  bfd_byte the_buffer[MAXLEN];
112  bfd_vma insn_start;
113  jmp_buf bailout;
114};
115
116/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
117   to ADDR (exclusive) are valid.  Returns 1 for success, longjmps
118   on error.  */
119#define FETCH_DATA(info, addr) \
120  ((addr) <= ((struct private *) (info->private_data))->max_fetched \
121   ? 1 : fetch_data ((info), (addr)))
122
123static int
124fetch_data (struct disassemble_info *info, bfd_byte *addr)
125{
126  int status;
127  struct private *priv = (struct private *)info->private_data;
128  bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
129
130  status = (*info->read_memory_func) (start,
131				      priv->max_fetched,
132				      addr - priv->max_fetched,
133				      info);
134  if (status != 0)
135    {
136      (*info->memory_error_func) (status, start, info);
137      longjmp (priv->bailout, 1);
138    }
139  else
140    priv->max_fetched = addr;
141  return 1;
142}
143
144/* This function is used to print to the bit-bucket.  */
145static int
146dummy_printer (FILE *file ATTRIBUTE_UNUSED,
147	       const char *format ATTRIBUTE_UNUSED,
148	       ...)
149{
150  return 0;
151}
152
153static void
154dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED,
155		     struct disassemble_info *info ATTRIBUTE_UNUSED)
156{
157}
158
159/* Fetch BITS bits from a position in the instruction specified by CODE.
160   CODE is a "place to put an argument", or 'x' for a destination
161   that is a general address (mode and register).
162   BUFFER contains the instruction.  */
163
164static int
165fetch_arg (unsigned char *buffer,
166	   int code,
167	   int bits,
168	   disassemble_info *info)
169{
170  int val = 0;
171
172  switch (code)
173    {
174    case '/': /* MAC/EMAC mask bit.  */
175      val = buffer[3] >> 5;
176      break;
177
178    case 'G': /* EMAC ACC load.  */
179      val = ((buffer[3] >> 3) & 0x2) | ((~buffer[1] >> 7) & 0x1);
180      break;
181
182    case 'H': /* EMAC ACC !load.  */
183      val = ((buffer[3] >> 3) & 0x2) | ((buffer[1] >> 7) & 0x1);
184      break;
185
186    case ']': /* EMAC ACCEXT bit.  */
187      val = buffer[0] >> 2;
188      break;
189
190    case 'I': /* MAC/EMAC scale factor.  */
191      val = buffer[2] >> 1;
192      break;
193
194    case 'F': /* EMAC ACCx.  */
195      val = buffer[0] >> 1;
196      break;
197
198    case 'f':
199      val = buffer[1];
200      break;
201
202    case 's':
203      val = buffer[1];
204      break;
205
206    case 'd':			/* Destination, for register or quick.  */
207      val = (buffer[0] << 8) + buffer[1];
208      val >>= 9;
209      break;
210
211    case 'x':			/* Destination, for general arg.  */
212      val = (buffer[0] << 8) + buffer[1];
213      val >>= 6;
214      break;
215
216    case 'k':
217      FETCH_DATA (info, buffer + 3);
218      val = (buffer[3] >> 4);
219      break;
220
221    case 'C':
222      FETCH_DATA (info, buffer + 3);
223      val = buffer[3];
224      break;
225
226    case '1':
227      FETCH_DATA (info, buffer + 3);
228      val = (buffer[2] << 8) + buffer[3];
229      val >>= 12;
230      break;
231
232    case '2':
233      FETCH_DATA (info, buffer + 3);
234      val = (buffer[2] << 8) + buffer[3];
235      val >>= 6;
236      break;
237
238    case '3':
239    case 'j':
240      FETCH_DATA (info, buffer + 3);
241      val = (buffer[2] << 8) + buffer[3];
242      break;
243
244    case '4':
245      FETCH_DATA (info, buffer + 5);
246      val = (buffer[4] << 8) + buffer[5];
247      val >>= 12;
248      break;
249
250    case '5':
251      FETCH_DATA (info, buffer + 5);
252      val = (buffer[4] << 8) + buffer[5];
253      val >>= 6;
254      break;
255
256    case '6':
257      FETCH_DATA (info, buffer + 5);
258      val = (buffer[4] << 8) + buffer[5];
259      break;
260
261    case '7':
262      FETCH_DATA (info, buffer + 3);
263      val = (buffer[2] << 8) + buffer[3];
264      val >>= 7;
265      break;
266
267    case '8':
268      FETCH_DATA (info, buffer + 3);
269      val = (buffer[2] << 8) + buffer[3];
270      val >>= 10;
271      break;
272
273    case '9':
274      FETCH_DATA (info, buffer + 3);
275      val = (buffer[2] << 8) + buffer[3];
276      val >>= 5;
277      break;
278
279    case 'e':
280      val = (buffer[1] >> 6);
281      break;
282
283    case 'm':
284      val = (buffer[1] & 0x40 ? 0x8 : 0)
285	| ((buffer[0] >> 1) & 0x7)
286	| (buffer[3] & 0x80 ? 0x10 : 0);
287      break;
288
289    case 'n':
290      val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7);
291      break;
292
293    case 'o':
294      val = (buffer[2] >> 4) | (buffer[3] & 0x80 ? 0x10 : 0);
295      break;
296
297    case 'M':
298      val = (buffer[1] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
299      break;
300
301    case 'N':
302      val = (buffer[3] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
303      break;
304
305    case 'h':
306      val = buffer[2] >> 2;
307      break;
308
309    default:
310      abort ();
311    }
312
313  switch (bits)
314    {
315    case 1:
316      return val & 1;
317    case 2:
318      return val & 3;
319    case 3:
320      return val & 7;
321    case 4:
322      return val & 017;
323    case 5:
324      return val & 037;
325    case 6:
326      return val & 077;
327    case 7:
328      return val & 0177;
329    case 8:
330      return val & 0377;
331    case 12:
332      return val & 07777;
333    default:
334      abort ();
335    }
336}
337
338/* Check if an EA is valid for a particular code.  This is required
339   for the EMAC instructions since the type of source address determines
340   if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
341   is a non-load EMAC instruction and the bits mean register Ry.
342   A similar case exists for the movem instructions where the register
343   mask is interpreted differently for different EAs.  */
344
345static bfd_boolean
346m68k_valid_ea (char code, int val)
347{
348  int mode, mask;
349#define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
350  (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
351   | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
352
353  switch (code)
354    {
355    case '*':
356      mask = M (1,1,1,1,1,1,1,1,1,1,1,1);
357      break;
358    case '~':
359      mask = M (0,0,1,1,1,1,1,1,1,0,0,0);
360      break;
361    case '%':
362      mask = M (1,1,1,1,1,1,1,1,1,0,0,0);
363      break;
364    case ';':
365      mask = M (1,0,1,1,1,1,1,1,1,1,1,1);
366      break;
367    case '@':
368      mask = M (1,0,1,1,1,1,1,1,1,1,1,0);
369      break;
370    case '!':
371      mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
372      break;
373    case '&':
374      mask = M (0,0,1,0,0,1,1,1,1,0,0,0);
375      break;
376    case '$':
377      mask = M (1,0,1,1,1,1,1,1,1,0,0,0);
378      break;
379    case '?':
380      mask = M (1,0,1,0,0,1,1,1,1,0,0,0);
381      break;
382    case '/':
383      mask = M (1,0,1,0,0,1,1,1,1,1,1,0);
384      break;
385    case '|':
386      mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
387      break;
388    case '>':
389      mask = M (0,0,1,0,1,1,1,1,1,0,0,0);
390      break;
391    case '<':
392      mask = M (0,0,1,1,0,1,1,1,1,1,1,0);
393      break;
394    case 'm':
395      mask = M (1,1,1,1,1,0,0,0,0,0,0,0);
396      break;
397    case 'n':
398      mask = M (0,0,0,0,0,1,0,0,0,1,0,0);
399      break;
400    case 'o':
401      mask = M (0,0,0,0,0,0,1,1,1,0,1,1);
402      break;
403    case 'p':
404      mask = M (1,1,1,1,1,1,0,0,0,0,0,0);
405      break;
406    case 'q':
407      mask = M (1,0,1,1,1,1,0,0,0,0,0,0);
408      break;
409    case 'v':
410      mask = M (1,0,1,1,1,1,0,1,1,0,0,0);
411      break;
412    case 'b':
413      mask = M (1,0,1,1,1,1,0,0,0,1,0,0);
414      break;
415    case 'w':
416      mask = M (0,0,1,1,1,1,0,0,0,1,0,0);
417      break;
418    case 'y':
419      mask = M (0,0,1,0,0,1,0,0,0,0,0,0);
420      break;
421    case 'z':
422      mask = M (0,0,1,0,0,1,0,0,0,1,0,0);
423      break;
424    case '4':
425      mask = M (0,0,1,1,1,1,0,0,0,0,0,0);
426      break;
427    default:
428      abort ();
429    }
430#undef M
431
432  mode = (val >> 3) & 7;
433  if (mode == 7)
434    mode += val & 7;
435  return (mask & (1 << mode)) != 0;
436}
437
438/* Print a base register REGNO and displacement DISP, on INFO->STREAM.
439   REGNO = -1 for pc, -2 for none (suppressed).  */
440
441static void
442print_base (int regno, bfd_vma disp, disassemble_info *info)
443{
444  if (regno == -1)
445    {
446      (*info->fprintf_func) (info->stream, "%%pc@(");
447      (*info->print_address_func) (disp, info);
448    }
449  else
450    {
451      char buf[50];
452
453      if (regno == -2)
454	(*info->fprintf_func) (info->stream, "@(");
455      else if (regno == -3)
456	(*info->fprintf_func) (info->stream, "%%zpc@(");
457      else
458	(*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]);
459
460      sprintf_vma (buf, disp);
461      (*info->fprintf_func) (info->stream, "%s", buf);
462    }
463}
464
465/* Print an indexed argument.  The base register is BASEREG (-1 for pc).
466   P points to extension word, in buffer.
467   ADDR is the nominal core address of that extension word.  */
468
469static unsigned char *
470print_indexed (int basereg,
471	       unsigned char *p,
472	       bfd_vma addr,
473	       disassemble_info *info)
474{
475  int word;
476  static char *const scales[] = { "", ":2", ":4", ":8" };
477  bfd_vma base_disp;
478  bfd_vma outer_disp;
479  char buf[40];
480  char vmabuf[50];
481
482  word = NEXTWORD (p);
483
484  /* Generate the text for the index register.
485     Where this will be output is not yet determined.  */
486  sprintf (buf, "%s:%c%s",
487	   reg_names[(word >> 12) & 0xf],
488	   (word & 0x800) ? 'l' : 'w',
489	   scales[(word >> 9) & 3]);
490
491  /* Handle the 68000 style of indexing.  */
492
493  if ((word & 0x100) == 0)
494    {
495      base_disp = word & 0xff;
496      if ((base_disp & 0x80) != 0)
497	base_disp -= 0x100;
498      if (basereg == -1)
499	base_disp += addr;
500      print_base (basereg, base_disp, info);
501      (*info->fprintf_func) (info->stream, ",%s)", buf);
502      return p;
503    }
504
505  /* Handle the generalized kind.  */
506  /* First, compute the displacement to add to the base register.  */
507  if (word & 0200)
508    {
509      if (basereg == -1)
510	basereg = -3;
511      else
512	basereg = -2;
513    }
514  if (word & 0100)
515    buf[0] = '\0';
516  base_disp = 0;
517  switch ((word >> 4) & 3)
518    {
519    case 2:
520      base_disp = NEXTWORD (p);
521      break;
522    case 3:
523      base_disp = NEXTLONG (p);
524    }
525  if (basereg == -1)
526    base_disp += addr;
527
528  /* Handle single-level case (not indirect).  */
529  if ((word & 7) == 0)
530    {
531      print_base (basereg, base_disp, info);
532      if (buf[0] != '\0')
533	(*info->fprintf_func) (info->stream, ",%s", buf);
534      (*info->fprintf_func) (info->stream, ")");
535      return p;
536    }
537
538  /* Two level.  Compute displacement to add after indirection.  */
539  outer_disp = 0;
540  switch (word & 3)
541    {
542    case 2:
543      outer_disp = NEXTWORD (p);
544      break;
545    case 3:
546      outer_disp = NEXTLONG (p);
547    }
548
549  print_base (basereg, base_disp, info);
550  if ((word & 4) == 0 && buf[0] != '\0')
551    {
552      (*info->fprintf_func) (info->stream, ",%s", buf);
553      buf[0] = '\0';
554    }
555  sprintf_vma (vmabuf, outer_disp);
556  (*info->fprintf_func) (info->stream, ")@(%s", vmabuf);
557  if (buf[0] != '\0')
558    (*info->fprintf_func) (info->stream, ",%s", buf);
559  (*info->fprintf_func) (info->stream, ")");
560
561  return p;
562}
563
564/* Returns number of bytes "eaten" by the operand, or
565   return -1 if an invalid operand was found, or -2 if
566   an opcode tabe error was found.
567   ADDR is the pc for this arg to be relative to.  */
568
569static int
570print_insn_arg (const char *d,
571		unsigned char *buffer,
572		unsigned char *p0,
573		bfd_vma addr,
574		disassemble_info *info)
575{
576  int val = 0;
577  int place = d[1];
578  unsigned char *p = p0;
579  int regno;
580  const char *regname;
581  unsigned char *p1;
582  double flval;
583  int flt_p;
584  bfd_signed_vma disp;
585  unsigned int uval;
586
587  switch (*d)
588    {
589    case 'c':		/* Cache identifier.  */
590      {
591        static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
592        val = fetch_arg (buffer, place, 2, info);
593        (*info->fprintf_func) (info->stream, cacheFieldName[val]);
594        break;
595      }
596
597    case 'a':		/* Address register indirect only. Cf. case '+'.  */
598      {
599        (*info->fprintf_func)
600	  (info->stream,
601	   "%s@",
602	   reg_names[fetch_arg (buffer, place, 3, info) + 8]);
603        break;
604      }
605
606    case '_':		/* 32-bit absolute address for move16.  */
607      {
608        uval = NEXTULONG (p);
609	(*info->print_address_func) (uval, info);
610        break;
611      }
612
613    case 'C':
614      (*info->fprintf_func) (info->stream, "%%ccr");
615      break;
616
617    case 'S':
618      (*info->fprintf_func) (info->stream, "%%sr");
619      break;
620
621    case 'U':
622      (*info->fprintf_func) (info->stream, "%%usp");
623      break;
624
625    case 'E':
626      (*info->fprintf_func) (info->stream, "%%acc");
627      break;
628
629    case 'G':
630      (*info->fprintf_func) (info->stream, "%%macsr");
631      break;
632
633    case 'H':
634      (*info->fprintf_func) (info->stream, "%%mask");
635      break;
636
637    case 'J':
638      {
639	/* FIXME: There's a problem here, different m68k processors call the
640	   same address different names. This table can't get it right
641	   because it doesn't know which processor it's disassembling for.  */
642	static const struct { char *name; int value; } names[]
643	  = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
644	     {"%tc",  0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
645             {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
646	     {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
647	     {"%msp", 0x803}, {"%isp", 0x804},
648	     {"%flashbar", 0xc04}, {"%rambar", 0xc05}, /* mcf528x added these.  */
649
650	     /* Should we be calling this psr like we do in case 'Y'?  */
651	     {"%mmusr",0x805},
652
653             {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
654
655	     /* Fido added these.  */
656             {"%cac", 0xffe}, {"%mbb", 0xfff}};
657
658	val = fetch_arg (buffer, place, 12, info);
659	for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
660	  if (names[regno].value == val)
661	    {
662	      (*info->fprintf_func) (info->stream, "%s", names[regno].name);
663	      break;
664	    }
665	if (regno < 0)
666	  (*info->fprintf_func) (info->stream, "%d", val);
667      }
668      break;
669
670    case 'Q':
671      val = fetch_arg (buffer, place, 3, info);
672      /* 0 means 8, except for the bkpt instruction... */
673      if (val == 0 && d[1] != 's')
674	val = 8;
675      (*info->fprintf_func) (info->stream, "#%d", val);
676      break;
677
678    case 'x':
679      val = fetch_arg (buffer, place, 3, info);
680      /* 0 means -1.  */
681      if (val == 0)
682	val = -1;
683      (*info->fprintf_func) (info->stream, "#%d", val);
684      break;
685
686    case 'M':
687      if (place == 'h')
688	{
689	  static char *const scalefactor_name[] = { "<<", ">>" };
690	  val = fetch_arg (buffer, place, 1, info);
691	  (*info->fprintf_func) (info->stream, scalefactor_name[val]);
692	}
693      else
694	{
695	  val = fetch_arg (buffer, place, 8, info);
696	  if (val & 0x80)
697	    val = val - 0x100;
698	  (*info->fprintf_func) (info->stream, "#%d", val);
699	}
700      break;
701
702    case 'T':
703      val = fetch_arg (buffer, place, 4, info);
704      (*info->fprintf_func) (info->stream, "#%d", val);
705      break;
706
707    case 'D':
708      (*info->fprintf_func) (info->stream, "%s",
709			     reg_names[fetch_arg (buffer, place, 3, info)]);
710      break;
711
712    case 'A':
713      (*info->fprintf_func)
714	(info->stream, "%s",
715	 reg_names[fetch_arg (buffer, place, 3, info) + 010]);
716      break;
717
718    case 'R':
719      (*info->fprintf_func)
720	(info->stream, "%s",
721	 reg_names[fetch_arg (buffer, place, 4, info)]);
722      break;
723
724    case 'r':
725      regno = fetch_arg (buffer, place, 4, info);
726      if (regno > 7)
727	(*info->fprintf_func) (info->stream, "%s@", reg_names[regno]);
728      else
729	(*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]);
730      break;
731
732    case 'F':
733      (*info->fprintf_func)
734	(info->stream, "%%fp%d",
735	 fetch_arg (buffer, place, 3, info));
736      break;
737
738    case 'O':
739      val = fetch_arg (buffer, place, 6, info);
740      if (val & 0x20)
741	(*info->fprintf_func) (info->stream, "%s", reg_names[val & 7]);
742      else
743	(*info->fprintf_func) (info->stream, "%d", val);
744      break;
745
746    case '+':
747      (*info->fprintf_func)
748	(info->stream, "%s@+",
749	 reg_names[fetch_arg (buffer, place, 3, info) + 8]);
750      break;
751
752    case '-':
753      (*info->fprintf_func)
754	(info->stream, "%s@-",
755	 reg_names[fetch_arg (buffer, place, 3, info) + 8]);
756      break;
757
758    case 'k':
759      if (place == 'k')
760	(*info->fprintf_func)
761	  (info->stream, "{%s}",
762	   reg_names[fetch_arg (buffer, place, 3, info)]);
763      else if (place == 'C')
764	{
765	  val = fetch_arg (buffer, place, 7, info);
766	  if (val > 63)		/* This is a signed constant.  */
767	    val -= 128;
768	  (*info->fprintf_func) (info->stream, "{#%d}", val);
769	}
770      else
771	return -2;
772      break;
773
774    case '#':
775    case '^':
776      p1 = buffer + (*d == '#' ? 2 : 4);
777      if (place == 's')
778	val = fetch_arg (buffer, place, 4, info);
779      else if (place == 'C')
780	val = fetch_arg (buffer, place, 7, info);
781      else if (place == '8')
782	val = fetch_arg (buffer, place, 3, info);
783      else if (place == '3')
784	val = fetch_arg (buffer, place, 8, info);
785      else if (place == 'b')
786	val = NEXTBYTE (p1);
787      else if (place == 'w' || place == 'W')
788	val = NEXTWORD (p1);
789      else if (place == 'l')
790	val = NEXTLONG (p1);
791      else
792	return -2;
793      (*info->fprintf_func) (info->stream, "#%d", val);
794      break;
795
796    case 'B':
797      if (place == 'b')
798	disp = NEXTBYTE (p);
799      else if (place == 'B')
800	disp = COERCE_SIGNED_CHAR (buffer[1]);
801      else if (place == 'w' || place == 'W')
802	disp = NEXTWORD (p);
803      else if (place == 'l' || place == 'L' || place == 'C')
804	disp = NEXTLONG (p);
805      else if (place == 'g')
806	{
807	  disp = NEXTBYTE (buffer);
808	  if (disp == 0)
809	    disp = NEXTWORD (p);
810	  else if (disp == -1)
811	    disp = NEXTLONG (p);
812	}
813      else if (place == 'c')
814	{
815	  if (buffer[1] & 0x40)		/* If bit six is one, long offset.  */
816	    disp = NEXTLONG (p);
817	  else
818	    disp = NEXTWORD (p);
819	}
820      else
821	return -2;
822
823      (*info->print_address_func) (addr + disp, info);
824      break;
825
826    case 'd':
827      val = NEXTWORD (p);
828      (*info->fprintf_func)
829	(info->stream, "%s@(%d)",
830	 reg_names[fetch_arg (buffer, place, 3, info) + 8], val);
831      break;
832
833    case 's':
834      (*info->fprintf_func) (info->stream, "%s",
835			     fpcr_names[fetch_arg (buffer, place, 3, info)]);
836      break;
837
838    case 'e':
839      val = fetch_arg(buffer, place, 2, info);
840      (*info->fprintf_func) (info->stream, "%%acc%d", val);
841      break;
842
843    case 'g':
844      val = fetch_arg(buffer, place, 1, info);
845      (*info->fprintf_func) (info->stream, "%%accext%s", val==0 ? "01" : "23");
846      break;
847
848    case 'i':
849      val = fetch_arg(buffer, place, 2, info);
850      if (val == 1)
851	(*info->fprintf_func) (info->stream, "<<");
852      else if (val == 3)
853	(*info->fprintf_func) (info->stream, ">>");
854      else
855	return -1;
856      break;
857
858    case 'I':
859      /* Get coprocessor ID... */
860      val = fetch_arg (buffer, 'd', 3, info);
861
862      if (val != 1)				/* Unusual coprocessor ID?  */
863	(*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
864      break;
865
866    case '4':
867    case '*':
868    case '~':
869    case '%':
870    case ';':
871    case '@':
872    case '!':
873    case '$':
874    case '?':
875    case '/':
876    case '&':
877    case '|':
878    case '<':
879    case '>':
880    case 'm':
881    case 'n':
882    case 'o':
883    case 'p':
884    case 'q':
885    case 'v':
886    case 'b':
887    case 'w':
888    case 'y':
889    case 'z':
890      if (place == 'd')
891	{
892	  val = fetch_arg (buffer, 'x', 6, info);
893	  val = ((val & 7) << 3) + ((val >> 3) & 7);
894	}
895      else
896	val = fetch_arg (buffer, 's', 6, info);
897
898      /* If the <ea> is invalid for *d, then reject this match.  */
899      if (!m68k_valid_ea (*d, val))
900	return -1;
901
902      /* Get register number assuming address register.  */
903      regno = (val & 7) + 8;
904      regname = reg_names[regno];
905      switch (val >> 3)
906	{
907	case 0:
908	  (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
909	  break;
910
911	case 1:
912	  (*info->fprintf_func) (info->stream, "%s", regname);
913	  break;
914
915	case 2:
916	  (*info->fprintf_func) (info->stream, "%s@", regname);
917	  break;
918
919	case 3:
920	  (*info->fprintf_func) (info->stream, "%s@+", regname);
921	  break;
922
923	case 4:
924	  (*info->fprintf_func) (info->stream, "%s@-", regname);
925	  break;
926
927	case 5:
928	  val = NEXTWORD (p);
929	  (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val);
930	  break;
931
932	case 6:
933	  p = print_indexed (regno, p, addr, info);
934	  break;
935
936	case 7:
937	  switch (val & 7)
938	    {
939	    case 0:
940	      val = NEXTWORD (p);
941	      (*info->print_address_func) (val, info);
942	      break;
943
944	    case 1:
945	      uval = NEXTULONG (p);
946	      (*info->print_address_func) (uval, info);
947	      break;
948
949	    case 2:
950	      val = NEXTWORD (p);
951	      (*info->fprintf_func) (info->stream, "%%pc@(");
952	      (*info->print_address_func) (addr + val, info);
953	      (*info->fprintf_func) (info->stream, ")");
954	      break;
955
956	    case 3:
957	      p = print_indexed (-1, p, addr, info);
958	      break;
959
960	    case 4:
961	      flt_p = 1;	/* Assume it's a float... */
962	      switch (place)
963	      {
964		case 'b':
965		  val = NEXTBYTE (p);
966		  flt_p = 0;
967		  break;
968
969		case 'w':
970		  val = NEXTWORD (p);
971		  flt_p = 0;
972		  break;
973
974		case 'l':
975		  val = NEXTLONG (p);
976		  flt_p = 0;
977		  break;
978
979		case 'f':
980		  NEXTSINGLE (flval, p);
981		  break;
982
983		case 'F':
984		  NEXTDOUBLE (flval, p);
985		  break;
986
987		case 'x':
988		  NEXTEXTEND (flval, p);
989		  break;
990
991		case 'p':
992		  flval = NEXTPACKED (p);
993		  break;
994
995		default:
996		  return -1;
997	      }
998	      if (flt_p)	/* Print a float? */
999		(*info->fprintf_func) (info->stream, "#%g", flval);
1000	      else
1001		(*info->fprintf_func) (info->stream, "#%d", val);
1002	      break;
1003
1004	    default:
1005	      return -1;
1006	    }
1007	}
1008
1009      /* If place is '/', then this is the case of the mask bit for
1010	 mac/emac loads. Now that the arg has been printed, grab the
1011	 mask bit and if set, add a '&' to the arg.  */
1012      if (place == '/')
1013	{
1014	  val = fetch_arg (buffer, place, 1, info);
1015	  if (val)
1016	    info->fprintf_func (info->stream, "&");
1017	}
1018      break;
1019
1020    case 'L':
1021    case 'l':
1022	if (place == 'w')
1023	  {
1024	    char doneany;
1025	    p1 = buffer + 2;
1026	    val = NEXTWORD (p1);
1027	    /* Move the pointer ahead if this point is farther ahead
1028	       than the last.  */
1029	    p = p1 > p ? p1 : p;
1030	    if (val == 0)
1031	      {
1032		(*info->fprintf_func) (info->stream, "#0");
1033		break;
1034	      }
1035	    if (*d == 'l')
1036	      {
1037		int newval = 0;
1038
1039		for (regno = 0; regno < 16; ++regno)
1040		  if (val & (0x8000 >> regno))
1041		    newval |= 1 << regno;
1042		val = newval;
1043	      }
1044	    val &= 0xffff;
1045	    doneany = 0;
1046	    for (regno = 0; regno < 16; ++regno)
1047	      if (val & (1 << regno))
1048		{
1049		  int first_regno;
1050
1051		  if (doneany)
1052		    (*info->fprintf_func) (info->stream, "/");
1053		  doneany = 1;
1054		  (*info->fprintf_func) (info->stream, "%s", reg_names[regno]);
1055		  first_regno = regno;
1056		  while (val & (1 << (regno + 1)))
1057		    ++regno;
1058		  if (regno > first_regno)
1059		    (*info->fprintf_func) (info->stream, "-%s",
1060					   reg_names[regno]);
1061		}
1062	  }
1063	else if (place == '3')
1064	  {
1065	    /* `fmovem' insn.  */
1066	    char doneany;
1067	    val = fetch_arg (buffer, place, 8, info);
1068	    if (val == 0)
1069	      {
1070		(*info->fprintf_func) (info->stream, "#0");
1071		break;
1072	      }
1073	    if (*d == 'l')
1074	      {
1075		int newval = 0;
1076
1077		for (regno = 0; regno < 8; ++regno)
1078		  if (val & (0x80 >> regno))
1079		    newval |= 1 << regno;
1080		val = newval;
1081	      }
1082	    val &= 0xff;
1083	    doneany = 0;
1084	    for (regno = 0; regno < 8; ++regno)
1085	      if (val & (1 << regno))
1086		{
1087		  int first_regno;
1088		  if (doneany)
1089		    (*info->fprintf_func) (info->stream, "/");
1090		  doneany = 1;
1091		  (*info->fprintf_func) (info->stream, "%%fp%d", regno);
1092		  first_regno = regno;
1093		  while (val & (1 << (regno + 1)))
1094		    ++regno;
1095		  if (regno > first_regno)
1096		    (*info->fprintf_func) (info->stream, "-%%fp%d", regno);
1097		}
1098	  }
1099	else if (place == '8')
1100	  {
1101	    /* fmoveml for FP status registers.  */
1102	    (*info->fprintf_func) (info->stream, "%s",
1103				   fpcr_names[fetch_arg (buffer, place, 3,
1104							 info)]);
1105	  }
1106	else
1107	  return -2;
1108      break;
1109
1110    case 'X':
1111      place = '8';
1112    case 'Y':
1113    case 'Z':
1114    case 'W':
1115    case '0':
1116    case '1':
1117    case '2':
1118    case '3':
1119      {
1120	int val = fetch_arg (buffer, place, 5, info);
1121	char *name = 0;
1122
1123	switch (val)
1124	  {
1125	  case 2: name = "%tt0"; break;
1126	  case 3: name = "%tt1"; break;
1127	  case 0x10: name = "%tc"; break;
1128	  case 0x11: name = "%drp"; break;
1129	  case 0x12: name = "%srp"; break;
1130	  case 0x13: name = "%crp"; break;
1131	  case 0x14: name = "%cal"; break;
1132	  case 0x15: name = "%val"; break;
1133	  case 0x16: name = "%scc"; break;
1134	  case 0x17: name = "%ac"; break;
1135 	  case 0x18: name = "%psr"; break;
1136	  case 0x19: name = "%pcsr"; break;
1137	  case 0x1c:
1138	  case 0x1d:
1139	    {
1140	      int break_reg = ((buffer[3] >> 2) & 7);
1141
1142	      (*info->fprintf_func)
1143		(info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
1144		 break_reg);
1145	    }
1146	    break;
1147	  default:
1148	    (*info->fprintf_func) (info->stream, "<mmu register %d>", val);
1149	  }
1150	if (name)
1151	  (*info->fprintf_func) (info->stream, "%s", name);
1152      }
1153      break;
1154
1155    case 'f':
1156      {
1157	int fc = fetch_arg (buffer, place, 5, info);
1158
1159	if (fc == 1)
1160	  (*info->fprintf_func) (info->stream, "%%dfc");
1161	else if (fc == 0)
1162	  (*info->fprintf_func) (info->stream, "%%sfc");
1163	else
1164	  /* xgettext:c-format */
1165	  (*info->fprintf_func) (info->stream, _("<function code %d>"), fc);
1166      }
1167      break;
1168
1169    case 'V':
1170      (*info->fprintf_func) (info->stream, "%%val");
1171      break;
1172
1173    case 't':
1174      {
1175	int level = fetch_arg (buffer, place, 3, info);
1176
1177	(*info->fprintf_func) (info->stream, "%d", level);
1178      }
1179      break;
1180
1181    case 'u':
1182      {
1183	short is_upper = 0;
1184	int reg = fetch_arg (buffer, place, 5, info);
1185
1186	if (reg & 0x10)
1187	  {
1188	    is_upper = 1;
1189	    reg &= 0xf;
1190	  }
1191	(*info->fprintf_func) (info->stream, "%s%s",
1192			       reg_half_names[reg],
1193			       is_upper ? "u" : "l");
1194      }
1195      break;
1196
1197    default:
1198      return -2;
1199    }
1200
1201  return p - p0;
1202}
1203
1204/* Try to match the current instruction to best and if so, return the
1205   number of bytes consumed from the instruction stream, else zero.  */
1206
1207static int
1208match_insn_m68k (bfd_vma memaddr,
1209		 disassemble_info * info,
1210		 const struct m68k_opcode * best)
1211{
1212  unsigned char *save_p;
1213  unsigned char *p;
1214  const char *d;
1215
1216  struct private *priv = (struct private *) info->private_data;
1217  bfd_byte *buffer = priv->the_buffer;
1218  fprintf_ftype save_printer = info->fprintf_func;
1219  void (* save_print_address) (bfd_vma, struct disassemble_info *)
1220    = info->print_address_func;
1221
1222  /* Point at first word of argument data,
1223     and at descriptor for first argument.  */
1224  p = buffer + 2;
1225
1226  /* Figure out how long the fixed-size portion of the instruction is.
1227     The only place this is stored in the opcode table is
1228     in the arguments--look for arguments which specify fields in the 2nd
1229     or 3rd words of the instruction.  */
1230  for (d = best->args; *d; d += 2)
1231    {
1232      /* I don't think it is necessary to be checking d[0] here;
1233	 I suspect all this could be moved to the case statement below.  */
1234      if (d[0] == '#')
1235	{
1236	  if (d[1] == 'l' && p - buffer < 6)
1237	    p = buffer + 6;
1238	  else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8')
1239	    p = buffer + 4;
1240	}
1241
1242      if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
1243	p = buffer + 4;
1244
1245      switch (d[1])
1246	{
1247	case '1':
1248	case '2':
1249	case '3':
1250	case '7':
1251	case '8':
1252	case '9':
1253	case 'i':
1254	  if (p - buffer < 4)
1255	    p = buffer + 4;
1256	  break;
1257	case '4':
1258	case '5':
1259	case '6':
1260	  if (p - buffer < 6)
1261	    p = buffer + 6;
1262	  break;
1263	default:
1264	  break;
1265	}
1266    }
1267
1268  /* pflusha is an exceptions.  It takes no arguments but is two words
1269     long.  Recognize it by looking at the lower 16 bits of the mask.  */
1270  if (p - buffer < 4 && (best->match & 0xFFFF) != 0)
1271    p = buffer + 4;
1272
1273  /* lpstop is another exception.  It takes a one word argument but is
1274     three words long.  */
1275  if (p - buffer < 6
1276      && (best->match & 0xffff) == 0xffff
1277      && best->args[0] == '#'
1278      && best->args[1] == 'w')
1279    {
1280      /* Copy the one word argument into the usual location for a one
1281	 word argument, to simplify printing it.  We can get away with
1282	 this because we know exactly what the second word is, and we
1283	 aren't going to print anything based on it.  */
1284      p = buffer + 6;
1285      FETCH_DATA (info, p);
1286      buffer[2] = buffer[4];
1287      buffer[3] = buffer[5];
1288    }
1289
1290  FETCH_DATA (info, p);
1291
1292  d = best->args;
1293
1294  save_p = p;
1295  info->print_address_func = dummy_print_address;
1296  info->fprintf_func = (fprintf_ftype) dummy_printer;
1297
1298  /* We scan the operands twice.  The first time we don't print anything,
1299     but look for errors.  */
1300  for (; *d; d += 2)
1301    {
1302      int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1303
1304      if (eaten >= 0)
1305	p += eaten;
1306      else if (eaten == -1)
1307	{
1308	  info->fprintf_func = save_printer;
1309	  info->print_address_func = save_print_address;
1310	  return 0;
1311	}
1312      else
1313	{
1314	  /* We must restore the print functions before trying to print the
1315	     error message.  */
1316	  info->fprintf_func = save_printer;
1317	  info->print_address_func = save_print_address;
1318	  info->fprintf_func (info->stream,
1319			      /* xgettext:c-format */
1320			      _("<internal error in opcode table: %s %s>\n"),
1321			      best->name,  best->args);
1322	  return 2;
1323	}
1324    }
1325
1326  p = save_p;
1327  info->fprintf_func = save_printer;
1328  info->print_address_func = save_print_address;
1329
1330  d = best->args;
1331
1332  info->fprintf_func (info->stream, "%s", best->name);
1333
1334  if (*d)
1335    info->fprintf_func (info->stream, " ");
1336
1337  while (*d)
1338    {
1339      p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1340      d += 2;
1341
1342      if (*d && *(d - 2) != 'I' && *d != 'k')
1343	info->fprintf_func (info->stream, ",");
1344    }
1345
1346  return p - buffer;
1347}
1348
1349/* Try to interpret the instruction at address MEMADDR as one that
1350   can execute on a processor with the features given by ARCH_MASK.
1351   If successful, print the instruction to INFO->STREAM and return
1352   its length in bytes.  Return 0 otherwise.  */
1353
1354static int
1355m68k_scan_mask (bfd_vma memaddr, disassemble_info *info,
1356		unsigned int arch_mask)
1357{
1358  int i;
1359  const char *d;
1360  static const struct m68k_opcode **opcodes[16];
1361  static int numopcodes[16];
1362  int val;
1363  int major_opcode;
1364
1365  struct private *priv = (struct private *) info->private_data;
1366  bfd_byte *buffer = priv->the_buffer;
1367
1368  if (!opcodes[0])
1369    {
1370      /* Speed up the matching by sorting the opcode
1371	 table on the upper four bits of the opcode.  */
1372      const struct m68k_opcode **opc_pointer[16];
1373
1374      /* First count how many opcodes are in each of the sixteen buckets.  */
1375      for (i = 0; i < m68k_numopcodes; i++)
1376	numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++;
1377
1378      /* Then create a sorted table of pointers
1379	 that point into the unsorted table.  */
1380      opc_pointer[0] = xmalloc (sizeof (struct m68k_opcode *)
1381				* m68k_numopcodes);
1382      opcodes[0] = opc_pointer[0];
1383
1384      for (i = 1; i < 16; i++)
1385	{
1386	  opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1];
1387	  opcodes[i] = opc_pointer[i];
1388	}
1389
1390      for (i = 0; i < m68k_numopcodes; i++)
1391	*opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i];
1392    }
1393
1394  FETCH_DATA (info, buffer + 2);
1395  major_opcode = (buffer[0] >> 4) & 15;
1396
1397  for (i = 0; i < numopcodes[major_opcode]; i++)
1398    {
1399      const struct m68k_opcode *opc = opcodes[major_opcode][i];
1400      unsigned long opcode = opc->opcode;
1401      unsigned long match = opc->match;
1402
1403      if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
1404	  && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
1405	  /* Only fetch the next two bytes if we need to.  */
1406	  && (((0xffff & match) == 0)
1407	      ||
1408	      (FETCH_DATA (info, buffer + 4)
1409	       && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
1410	       && ((0xff & buffer[3] & match) == (0xff & opcode)))
1411	      )
1412	  && (opc->arch & arch_mask) != 0)
1413	{
1414	  /* Don't use for printout the variants of divul and divsl
1415	     that have the same register number in two places.
1416	     The more general variants will match instead.  */
1417	  for (d = opc->args; *d; d += 2)
1418	    if (d[1] == 'D')
1419	      break;
1420
1421	  /* Don't use for printout the variants of most floating
1422	     point coprocessor instructions which use the same
1423	     register number in two places, as above.  */
1424	  if (*d == '\0')
1425	    for (d = opc->args; *d; d += 2)
1426	      if (d[1] == 't')
1427		break;
1428
1429	  /* Don't match fmovel with more than one register;
1430	     wait for fmoveml.  */
1431	  if (*d == '\0')
1432	    {
1433	      for (d = opc->args; *d; d += 2)
1434		{
1435		  if (d[0] == 's' && d[1] == '8')
1436		    {
1437		      val = fetch_arg (buffer, d[1], 3, info);
1438		      if ((val & (val - 1)) != 0)
1439			break;
1440		    }
1441		}
1442	    }
1443
1444	  /* Don't match FPU insns with non-default coprocessor ID.  */
1445	  if (*d == '\0')
1446	    {
1447	      for (d = opc->args; *d; d += 2)
1448		{
1449		  if (d[0] == 'I')
1450		    {
1451		      val = fetch_arg (buffer, 'd', 3, info);
1452		      if (val != 1)
1453			break;
1454		    }
1455		}
1456	    }
1457
1458	  if (*d == '\0')
1459	    if ((val = match_insn_m68k (memaddr, info, opc)))
1460	      return val;
1461	}
1462    }
1463  return 0;
1464}
1465
1466/* Print the m68k instruction at address MEMADDR in debugged memory,
1467   on INFO->STREAM.  Returns length of the instruction, in bytes.  */
1468
1469int
1470print_insn_m68k (bfd_vma memaddr, disassemble_info *info)
1471{
1472  unsigned int arch_mask;
1473  struct private priv;
1474  int val;
1475
1476  bfd_byte *buffer = priv.the_buffer;
1477
1478  info->private_data = (PTR) &priv;
1479  /* Tell objdump to use two bytes per chunk
1480     and six bytes per line for displaying raw data.  */
1481  info->bytes_per_chunk = 2;
1482  info->bytes_per_line = 6;
1483  info->display_endian = BFD_ENDIAN_BIG;
1484  priv.max_fetched = priv.the_buffer;
1485  priv.insn_start = memaddr;
1486
1487  if (setjmp (priv.bailout) != 0)
1488    /* Error return.  */
1489    return -1;
1490
1491  arch_mask = bfd_m68k_mach_to_features (info->mach);
1492  if (!arch_mask)
1493    {
1494      /* First try printing an m680x0 instruction.  Try printing a Coldfire
1495	 one if that fails.  */
1496      val = m68k_scan_mask (memaddr, info, m68k_mask);
1497      if (val)
1498	return val;
1499
1500      val = m68k_scan_mask (memaddr, info, mcf_mask);
1501      if (val)
1502	return val;
1503    }
1504  else
1505    {
1506      val = m68k_scan_mask (memaddr, info, arch_mask);
1507      if (val)
1508	return val;
1509    }
1510
1511  /* Handle undefined instructions.  */
1512  info->fprintf_func (info->stream, "0%o", (buffer[0] << 8) + buffer[1]);
1513  return 2;
1514}
1515