Searched refs:RIP (Results 1 - 14 of 14) sorted by relevance

/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.cpp366 ? X86::RIP // Should have dwarf #16.
406 MachineLocation CSSrc(is64Bit ? X86::RIP : X86::EIP);
H A DX86AsmBackend.cpp239 // Check if it has an expression and is not RIP relative.
247 if (Op.isReg() && Op.getReg() == X86::RIP)
H A DX86MCCodeEmitter.cpp309 if (BaseReg == X86::RIP) { // [disp32+RIP] in X86-64 mode
337 // If no BaseReg, issue a RIP relative instruction only if the MCE can
348 // byte to emit an addr that is just 'disp32' (the non-RIP relative form).
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/
H A DX86RegisterInfo.cpp60 ? X86::RIP : X86::EIP,
311 Reserved.set(X86::RIP);
312 for (MCSubRegIterator I(X86::RIP, this); I.isValid(); ++I)
H A DX86CodeEmitter.cpp429 // But it's probably not beneficial. If the MCE supports using RIP directly
484 if (BaseReg == X86::RIP ||
485 (Is64BitMode && DispForReloc)) { // [disp32+RIP] in X86-64 mode
495 // while others, unless explicit asked to use RIP, use absolute references.
499 // If no BaseReg, issue a RIP relative instruction only if the MCE can
503 if (BaseReg != 0 && BaseReg != X86::RIP)
513 // byte to emit an addr that is just 'disp32' (the non-RIP relative form).
516 BaseReg == X86::RIP) { // [disp32+RIP] in X86-64 mode
H A DX86FastISel.cpp502 // RIP-relative addresses can't have additional register operands, so if
526 AM.Base.Reg = X86::RIP;
555 StubAM.Base.Reg = X86::RIP;
635 // RIP-relative addresses can't have additional register operands.
658 AM.Base.Reg = X86::RIP;
2119 PICBase = X86::RIP;
H A DX86AsmPrinter.cpp319 BaseReg.getReg() == X86::RIP)
H A DX86MCInstLower.cpp588 LEA.addOperand(MCOperand::CreateReg(X86::RIP)); // base
H A DX86ISelDAGToDAG.cpp88 /// isRIPRelative - Return true if this addressing mode is already RIP
94 return RegNode->getReg() == X86::RIP;
239 // These are 32-bit even in 64-bit mode since RIP relative offset
635 // folding because RIP is preferable to non-RIP accesses.
679 AM.setBaseReg(CurDAG->getRegister(X86::RIP, MVT::i64));
685 // mode, this only applies to a non-RIP-relative computation.
689 "RIP-relative addressing already handled");
744 AM.Base_Reg = CurDAG->getRegister(X86::RIP, MVT::i64);
969 // RIP relativ
[all...]
H A DX86InstrInfo.cpp1568 if (BaseReg == 0 || BaseReg == X86::RIP)
3931 PICBase = X86::RIP;
4484 "X86-64 PIC uses RIP relative addressing");
4682 "X86-64 PIC uses RIP relative addressing");
H A DX86ISelLowering.cpp1419 // X86-64 uses RIP relative addressing based on the jump table label.
7568 // Most TLS accesses are not RIP relative, even on x86-64. One exception is
13220 .addReg(X86::RIP)
16819 // RIP in the class. Do they matter any more here than they do
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/Disassembler/
H A DX86DisassemblerDecoder.h291 ENTRY(RIP)
H A DX86Disassembler.cpp567 baseReg = MCOperand::CreateReg(X86::RIP); // Section 2.2.1.6
/macosx-10.9.5/llvmCore-3425.0.33/lib/Transforms/Scalar/
H A DObjCARC.cpp3262 Instruction *RIP = *RI; local
3263 if (ReleasesToMove.ReverseInsertPts.insert(RIP))
3264 NewDelta -= BBStates[RIP->getParent()].GetAllPathCount();
3314 Instruction *RIP = *RI; local
3315 if (RetainsToMove.ReverseInsertPts.insert(RIP)) {
3316 PathCount = BBStates[RIP->getParent()].GetAllPathCount();

Completed in 309 milliseconds