Searched refs:Operands (Results 1 - 25 of 62) sorted by relevance

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/macosx-10.9.5/llvmCore-3425.0.33/utils/TableGen/
H A DAsmWriterInst.h87 std::vector<AsmWriterOperand> Operands; member in class:llvm::AsmWriterInst
104 if (!Operands.empty() &&
105 Operands.back().OperandType == AsmWriterOperand::isLiteralTextOperand)
106 Operands.back().Str.append(Str);
108 Operands.push_back(AsmWriterOperand(Str));
H A DFastISelEmitter.cpp116 SmallVector<OpKind, 3> Operands;
119 return Operands < O.Operands;
122 return Operands == O.Operands;
125 bool empty() const { return Operands.empty(); }
128 for (unsigned i = 0, e = Operands.size(); i != e; ++i)
129 if (Operands[i].isImm() && Operands[i].getImmCode() != 0)
138 for (unsigned i = 0, e = Operands
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H A DAsmWriterInst.cpp86 Operands.push_back(
118 Operands.push_back(
195 Operands.push_back(AsmWriterOperand("PrintSpecial",
201 unsigned OpNo = CGI.Operands.getOperandNamed(VarName);
202 CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo];
205 Operands.push_back(AsmWriterOperand(OpInfo.PrinterMethodName,
212 Operands.push_back(AsmWriterOperand("return;",
221 if (Operands.size() != Other.Operands.size()) return ~1;
224 for (unsigned i = 0, e = Operands
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H A DPseudoLoweringEmitter.cpp92 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec)
96 Insn.Operands[BaseIdx + i].Rec->getName() + "'");
100 for (unsigned I = 0, E = Insn.Operands[i].MINumOperands; I != E; ++I)
102 OpsAdded += Insn.Operands[i].MINumOperands;
145 if (Insn.Operands.size() != Dag->getNumArgs())
150 for (unsigned i = 0, e = Insn.Operands.size(); i != e; ++i)
151 NumMIOperands += Insn.Operands[i].MINumOperands;
159 // Operands that are a sublass of OperandWithDefaultOp have default values.
170 for (unsigned i = 0, e = SourceInsn.Operands.size(); i != e; ++i)
171 SourceOperands[SourceInsn.Operands[
[all...]
H A DInstrInfoEmitter.cpp74 for (unsigned i = 0, e = Inst.Operands.size(); i != e; ++i) {
83 DagInit *MIOI = Inst.Operands[i].MIOperandInfo;
87 OperandList.push_back(Inst.Operands[i]);
89 for (unsigned j = 0, e = Inst.Operands[i].MINumOperands; j != e; ++j) {
90 OperandList.push_back(Inst.Operands[i]);
120 if (Inst.Operands[i].Rec->isSubClassOf("PredicateOperand"))
125 if (Inst.Operands[i].Rec->isSubClassOf("OptionalDefOperand"))
130 assert(!Inst.Operands[i].OperandType.empty() && "Invalid operand type.");
131 Res += Inst.Operands[i].OperandType;
137 Inst.Operands[
[all...]
H A DAsmWriterEmitter.cpp108 for (unsigned i = 0, e = FirstInst.Operands.size(); i != e; ++i) {
111 O << " " << FirstInst.Operands[i].getCode();
119 FirstInst.Operands[i]));
125 AWI.Operands[i]));
155 if (Inst->Operands.empty())
158 Command = " " + Inst->Operands[0].getCode() + "\n";
197 if (!FirstInst || FirstInst->Operands.size() == Op)
205 size_t MaxSize = FirstInst->Operands.size();
216 OtherInst->Operands.size() > FirstInst->Operands
[all...]
H A DCodeEmitterGen.cpp131 if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) {
133 OpIdx = CGI.Operands[OpIdx].MIOperandNo;
134 assert(!CGI.Operands.isFlatOperandNotEmitted(OpIdx) &&
139 while (CGI.Operands.isFlatOperandNotEmitted(NumberedOp))
144 std::pair<unsigned, unsigned> SO = CGI.Operands.getSubOperandNumber(OpIdx);
145 std::string &EncoderMethodName = CGI.Operands[SO.first].EncoderMethodName;
H A DCodeGenInstruction.cpp291 : TheDef(R), Operands(R), InferredFrom(0) {
305 isPredicable = Operands.isPredicable || R->getValueAsBit("isPredicable");
334 ParseConstraints(R->getValueAsString("Constraints"), Operands);
337 Operands.ProcessDisableEncoding(R->getValueAsString("DisableEncoding"));
500 // If both are Operands with the same MVT, allow the conversion. It's
547 for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) {
552 if (ResultInst->Operands[i].MINumOperands == 1 &&
553 ResultInst->Operands[i].getTiedRegister() != -1)
559 Record *InstOpRec = ResultInst->Operands[i].Rec;
560 unsigned NumSubOps = ResultInst->Operands[
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/include/llvm/MC/
H A DMCInst.h153 SmallVector<MCOperand, 8> Operands; member in class:llvm::MCInst
163 const MCOperand &getOperand(unsigned i) const { return Operands[i]; }
164 MCOperand &getOperand(unsigned i) { return Operands[i]; }
165 unsigned getNumOperands() const { return Operands.size(); }
168 Operands.push_back(Op);
171 void clear() { Operands.clear(); }
172 size_t size() { return Operands.size(); }
175 iterator begin() { return Operands.begin(); }
176 iterator end() { return Operands.end(); }
178 return Operands
[all...]
H A DMCTargetAsmParser.h110 /// \param Operands [out] - The list of parsed operands, this returns
115 SmallVectorImpl<MCParsedAsmOperand*> &Operands) = 0;
141 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
152 const SmallVectorImpl<MCParsedAsmOperand*> &Operands) = 0;
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MBlaze/AsmParser/
H A DMBlazeAsmParser.cpp37 MBlazeOperand *ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands);
41 MBlazeOperand* ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands);
48 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
66 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
318 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
322 switch (MatchInstructionImpl(Operands, Inst, ErrorInfo,
335 if (ErrorInfo >= Operands.size())
338 ErrorLoc = ((MBlazeOperand*)Operands[ErrorInfo])->getStartLoc();
350 ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { argument
351 if (Operands
317 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, SmallVectorImpl<MCParsedAsmOperand*> &Operands, MCStreamer &Out, unsigned &ErrorInfo, bool MatchingInlineAsm) argument
453 ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
481 ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
[all...]
/macosx-10.9.5/JavaScriptCore-7537.78.1/dfg/
H A DDFGOSREntry.h30 #include "Operands.h"
44 Operands<AbstractValue> m_expectedValues;
H A DDFGBasicBlock.h35 #include "Operands.h"
127 Operands<Node*, NodePointerTraits> variablesAtHead;
128 Operands<Node*, NodePointerTraits> variablesAtTail;
130 Operands<AbstractValue> valuesAtHead;
131 Operands<AbstractValue> valuesAtTail;
H A DDFGVariableEventStream.h36 #include "Operands.h"
53 unsigned index, Operands<ValueRecovery>&) const;
H A DDFGOSRExitCompiler.h51 void compileExit(const OSRExit&, const Operands<ValueRecovery>&, SpeculationRecovery*);
H A DDFGAbstractState.h110 Operands<AbstractValue>& variables()
282 Operands<AbstractValue> m_variables;
H A DDFGVariableEventStream.cpp110 unsigned index, Operands<ValueRecovery>& valueRecoveries) const
125 valueRecoveries = Operands<ValueRecovery>(codeBlock->numParameters(), numVariables);
141 Operands<ValueSource> operandSources(codeBlock->numParameters(), numVariables);
179 valueRecoveries = Operands<ValueRecovery>(codeBlock->numParameters(), numVariables);
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp45 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
53 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
56 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
68 bool tryParseRegisterOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
263 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
267 unsigned MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo,
283 if (ErrorInfo >= Operands.size())
286 ErrorLoc = ((MipsOperand*)Operands[ErrorInfo])->getStartLoc();
437 tryParseRegisterOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands, argument
445 && Operands
262 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, SmallVectorImpl<MCParsedAsmOperand*> &Operands, MCStreamer &Out, unsigned &ErrorInfo, bool MatchingInlineAsm) argument
747 parseMathOperation(StringRef Name, SMLoc NameLoc, SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
800 ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/MC/MCDisassembler/
H A DEDInst.cpp42 unsigned int numOperands = Operands.size();
45 delete Operands[index];
124 Operands.push_back(operand);
151 return Operands.size();
158 if (index >= Operands.size())
161 operand = Operands[index];
/macosx-10.9.5/llvmCore-3425.0.33/lib/Analysis/
H A DScalarEvolutionNormalization.cpp109 SmallVector<const SCEV *, 8> Operands; local
116 Operands.push_back(TransformSubExpr(*I, LUser, 0));
119 const SCEV *Result = SE.getAddRecExpr(Operands, L, SCEV::FlagAnyWrap);
160 SmallVector<const SCEV *, 8> Operands; local
168 Operands.push_back(N);
173 case scAddExpr: return SE.getAddExpr(Operands);
174 case scMulExpr: return SE.getMulExpr(Operands);
175 case scSMaxExpr: return SE.getSMaxExpr(Operands);
176 case scUMaxExpr: return SE.getUMaxExpr(Operands);
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp227 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
258 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
264 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
2516 SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
2539 OwningPtr<ARMOperand> PrevOp((ARMOperand*)Operands.pop_back_val());
2596 Operands.push_back(ARMOperand::CreateShiftedRegister(ShiftTy, SrcReg,
2600 Operands.push_back(ARMOperand::CreateShiftedImmediate(ShiftTy, SrcReg, Imm,
2614 tryParseRegisterWithWriteBack(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { argument
2620 Operands.push_back(ARMOperand::CreateReg(RegNo, S, Parser.getTok().getLoc()));
2624 Operands
2515 tryParseShiftRegister( SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
2699 parseITCondCode(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
2736 parseCoprocNumOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
2755 parseCoprocRegOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
2773 parseCoprocOptionOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
2851 parseRegisterList(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3026 parseVectorList(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3278 parseMemBarrierOptOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3340 parseProcIFlagsOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3374 parseMSRMaskOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3501 parsePKHImm(SmallVectorImpl<MCParsedAsmOperand*> &Operands, StringRef Op, int Low, int High) argument
3548 parseSetEndImm(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3577 parseShifterImm(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3647 parseRotImm(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3693 parseBitfield(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3761 parsePostIdxReg(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3808 parseAM3Offset(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3882 cvtT2LdrdPre(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3899 cvtT2StrdPre(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3916 cvtLdWriteBackRegT2AddrModeImm8(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3931 cvtStWriteBackRegT2AddrModeImm8(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3944 cvtLdWriteBackRegAddrMode2(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3959 cvtLdWriteBackRegAddrModeImm12(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3975 cvtStWriteBackRegAddrModeImm12(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
3988 cvtStWriteBackRegAddrMode2(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4001 cvtStWriteBackRegAddrMode3(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4014 cvtLdExtTWriteBackImm(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4032 cvtLdExtTWriteBackReg(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4050 cvtStExtTWriteBackImm(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4068 cvtStExtTWriteBackReg(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4086 cvtLdrdPre(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4103 cvtStrdPre(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4120 cvtLdWriteBackRegAddrMode3(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4133 cvtThumbMultiply(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4150 cvtVLDwbFixed(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4163 cvtVLDwbRegister(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4178 cvtVSTwbFixed(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4191 cvtVSTwbRegister(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4208 parseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4453 parseFPImm(SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4528 parseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands, StringRef Mnemonic) argument
4809 shouldOmitCCOutOperand(StringRef Mnemonic, SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
4957 ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
5234 validateInstruction(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
5669 processInstruction(MCInst &Inst, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
7479 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, SmallVectorImpl<MCParsedAsmOperand*> &Operands, MCStreamer &Out, unsigned &ErrorInfo, bool MatchingInlineAsm) argument
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/
H A DMachineInstr.cpp549 Operands.reserve(NumImplicitOps + MCID->getNumOperands());
564 Operands.reserve(NumImplicitOps + MCID->getNumOperands());
580 Operands.reserve(NumImplicitOps + MCID->getNumOperands());
596 Operands.reserve(NumImplicitOps + MCID->getNumOperands());
609 Operands.reserve(MI.getNumOperands());
627 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
628 assert(Operands[i].ParentMI == this && "ParentMI mismatch!");
629 assert((!Operands[i].isReg() || !Operands[i].isOnRegUseList()) &&
648 for (unsigned i = 0, e = Operands
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/AsmParser/
H A DX86AsmParser.cpp75 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
115 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
1215 SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
1283 Operands.push_back(X86Operand::CreateToken(PatchedName, NameLoc));
1286 Operands.push_back(X86Operand::CreateImm(ExtraImmOp, NameLoc, NameLoc));
1305 Operands.push_back(X86Operand::CreateToken("*", Loc));
1311 Operands.push_back(Op);
1322 Operands.push_back(Op);
1342 Operands.push_back(X86Operand::CreateImm(ExtraImmOp, NameLoc, NameLoc));
1348 Operands
1214 ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, SmallVectorImpl<MCParsedAsmOperand*> &Operands) argument
1752 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, SmallVectorImpl<MCParsedAsmOperand*> &Operands, MCStreamer &Out, unsigned &ErrorInfo, bool MatchingInlineAsm) argument
[all...]
/macosx-10.9.5/JavaScriptCore-7537.78.1/bytecode/
H A DOperands.h52 class Operands { class in namespace:JSC
54 Operands() { } function in class:JSC::Operands
56 explicit Operands(size_t numArguments, size_t numLocals) function in class:JSC::Operands
140 const T& operand(int operand) const { return const_cast<const T&>(const_cast<Operands*>(this)->operand(operand)); }
217 void dumpOperands(const Operands<T, Traits>& operands, PrintStream& out) argument
/macosx-10.9.5/llvmCore-3425.0.33/include/llvm/Analysis/
H A DConstantFolding.h98 Constant *ConstantFoldCall(Function *F, ArrayRef<Constant *> Operands,

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