Searched refs:Op0 (Results 1 - 25 of 51) sorted by relevance

123

/macosx-10.9.5/llvmCore-3425.0.33/lib/Transforms/InstCombine/
H A DInstCombineMulDivRem.cpp101 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
103 if (Value *V = SimplifyMulInst(Op0, Op1, TD))
110 return BinaryOperator::CreateNeg(Op0, I.getName());
115 if (BinaryOperator *SI = dyn_cast<BinaryOperator>(Op0))
123 Constant *NewCst = ConstantInt::get(Op0->getType(), Val.logBase2());
124 BinaryOperator *Shl = BinaryOperator::CreateShl(Op0, NewCst);
132 if (Op0->hasOneUse() &&
133 match(Op0, m_Add(m_Value(X), m_ConstantInt(C1)))) {
147 if (Op0->hasOneUse()) {
150 if (match(Op0, m_Su
257 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
367 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
432 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
518 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
571 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
596 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
628 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
671 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
742 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
[all...]
H A DInstCombineAndOrXor.cpp720 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); local
723 return getNewICmpValue(isSigned, Code, Op0, Op1, Builder);
1019 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1021 if (Value *V = SimplifyAndInst(Op0, Op1, TD))
1037 if (BinaryOperator *Op0I = dyn_cast<BinaryOperator>(Op0)) {
1116 if (match(Op0, m_Trunc(m_And(m_Value(X), m_ConstantInt(YC))))) {
1129 if (SelectInst *SI = dyn_cast<SelectInst>(Op0))
1132 if (isa<PHINode>(Op0))
1139 if (Value *Op0NotVal = dyn_castNotVal(Op0))
1141 if (Op0
1448 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); local
1721 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
2044 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
2257 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); local
[all...]
H A DInstCombineShifts.cpp24 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
31 if (isa<Constant>(Op0))
37 if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I))
312 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, ConstantInt *Op1, argument
320 CanEvaluateShifted(Op0, Op1->getZExtValue(), isLeftShift, *this)) {
322 " to eliminate shift:\n IN: " << *Op0 << "\n SH: " << I <<"\n");
325 GetShiftedValue(Op0, Op1->getZExtValue(), isLeftShift, *this));
331 uint32_t TypeBits = Op0->getType()->getScalarSizeInBits();
338 return ReplaceInstUsesWith(I, Constant::getNullValue(Op0->getType()));
345 if (BinaryOperator *BO = dyn_cast<BinaryOperator>(Op0))
[all...]
H A DInstCombineAddSub.cpp496 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
498 if (Value *V = SimplifySubInst(Op0, Op1, I.hasNoSignedWrap(),
508 BinaryOperator *Res = BinaryOperator::CreateAdd(Op0, V);
515 return BinaryOperator::CreateXor(Op0, Op1);
518 if (match(Op0, m_AllOnes()))
521 if (ConstantInt *C = dyn_cast<ConstantInt>(Op0)) {
559 if (match(Op1, m_Add(m_Specific(Op0), m_Value(Y))) ||
560 match(Op1, m_Add(m_Value(Y), m_Specific(Op0))))
564 if (match(Op0, m_Sub(m_Specific(Op1), m_Value(Y))))
575 return BinaryOperator::CreateAdd(Op0,
654 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
[all...]
H A DInstCombineCompares.cpp1811 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
1816 if (getComplexity(Op0) < getComplexity(Op1)) {
1818 std::swap(Op0, Op1);
1822 if (Value *V = SimplifyICmpInst(I.getPredicate(), Op0, Op1, TD))
1830 if (match(Op0, m_Select(m_Value(Cond), m_Value(SelectTrue),
1843 Type *Ty = Op0->getType();
1850 Value *Xor = Builder->CreateXor(Op0, Op1, I.getName()+"tmp");
1854 return BinaryOperator::CreateXor(Op0, Op1);
1857 std::swap(Op0, Op1); // Change icmp ugt -> icmp ult
1860 Value *Not = Builder->CreateNot(Op0,
2858 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); local
[all...]
H A DInstructionCombining.cpp192 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(I.getOperand(0)); local
197 if (Op0 && Op0->getOpcode() == Opcode) {
198 Value *A = Op0->getOperand(0);
199 Value *B = Op0->getOperand(1);
210 (!Op0 || (isa<BinaryOperator>(Op0) && Op0->hasNoSignedWrap()))) {
212 // the operands to Op0.
248 if (Op0
377 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS); local
544 Value *Op0 = SO, *Op1 = ConstOperand; local
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/include/llvm/CodeGen/
H A DFastISel.h174 unsigned Op0, bool Op0IsKill);
183 unsigned Op0, bool Op0IsKill,
193 unsigned Op0, bool Op0IsKill,
203 unsigned Op0, bool Op0IsKill,
213 unsigned Op0, bool Op0IsKill,
223 unsigned Op0, bool Op0IsKill,
253 unsigned Op0, bool Op0IsKill);
260 unsigned Op0, bool Op0IsKill,
268 unsigned Op0, bool Op0IsKill,
277 unsigned Op0, boo
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/Analysis/
H A DInstructionSimplify.cpp137 if (BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS))
138 if (Op0->getOpcode() == OpcodeToExpand) {
140 Value *A = Op0->getOperand(0), *B = Op0->getOperand(1), *C = RHS;
197 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS);
200 if (!Op0 || Op0->getOpcode() != OpcodeToExtract ||
205 Value *A = Op0->getOperand(0), *B = Op0->getOperand(1);
268 BinaryOperator *Op0
592 SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
653 SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
757 SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
882 SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
891 SimplifyMulInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
954 SimplifyMulInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
962 SimplifyDiv(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1034 SimplifySDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1042 SimplifySDivInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1050 SimplifyUDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1058 SimplifyUDivInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1064 SimplifyFDivInst(Value *Op0, Value *Op1, const Query &Q, unsigned) argument
1077 SimplifyFDivInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1085 SimplifyRem(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1139 SimplifySRemInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1147 SimplifySRemInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1155 SimplifyURemInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1163 SimplifyURemInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1169 SimplifyFRemInst(Value *Op0, Value *Op1, const Query &, unsigned) argument
1182 SimplifyFRemInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1190 SimplifyShift(unsigned Opcode, Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1234 SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const Query &Q, unsigned MaxRecurse) argument
1250 SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1259 SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, const Query &Q, unsigned MaxRecurse) argument
1277 SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1287 SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, const Query &Q, unsigned MaxRecurse) argument
1309 SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1319 SimplifyAndInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1410 SimplifyAndInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1418 SimplifyOrInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1504 SimplifyOrInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
1512 SimplifyXorInst(Value *Op0, Value *Op1, const Query &Q, unsigned MaxRecurse) argument
1564 SimplifyXorInst(Value *Op0, Value *Op1, const TargetData *TD, const TargetLibraryInfo *TLI, const DominatorTree *DT) argument
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/CellSPU/
H A DSPUISelDAGToDAG.cpp266 SDValue Op0, Op1; local
270 if (!SelectDFormAddr(Op.getNode(), Op, Op0, Op1)
271 && !SelectAFormAddr(Op.getNode(), Op, Op0, Op1))
272 SelectXFormAddr(Op.getNode(), Op, Op0, Op1);
275 if (!SelectDFormAddr(Op.getNode(), Op, Op0, Op1)
276 && !SelectAFormAddr(Op.getNode(), Op, Op0, Op1)) {
277 Op0 = Op;
285 SelectAddrIdxOnly(Op, Op, Op0, Op1);
290 OutOps.push_back(Op0);
343 SDValue Op0 local
417 const SDValue Op0 = N.getOperand(0); local
470 const SDValue Op0 = N.getOperand(0); local
641 SDValue Op0 = N->getOperand(0); local
741 SDValue Op0 = N->getOperand(0); local
789 SDValue Op0 = N->getOperand(0); local
852 SDValue Op0 = N->getOperand(0); local
903 SDValue Op0 = N->getOperand(0); local
971 SDValue Op0 = N->getOperand(0); local
1129 SDValue Op0 = i64vec.getOperand(0); local
[all...]
H A DSPUISelLowering.cpp641 SDValue Op0 = basePtr.getOperand(0); local
648 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1);
654 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1);
836 SDValue Op0 = basePtr.getOperand(0); local
843 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1);
849 basePtr = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Op0, Op1);
1958 SDValue Op0 = Op.getOperand(0); // Op0 = the scalar local
1961 if (Op0.getNode()->getOpcode() == ISD::Constant) {
1965 ConstantSDNode *CN = cast<ConstantSDNode>(Op0
2467 SDValue Op0 = Op.getOperand(0); local
2493 SDValue Op0 = Op.getOperand(0); local
2685 SDValue Op0 = Op.getOperand(0); local
2726 SDValue Op0 = Op.getOperand(0); local
2908 SDValue Op0 = N->getOperand(0); // everything has at least one operand local
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/include/llvm/Support/
H A DGetElementPtrTypeIterator.h102 gep_type_begin(Type *Op0, ArrayRef<T> A) { argument
103 return generic_gep_type_iterator<const T *>::begin(Op0, A.begin());
108 gep_type_end(Type *Op0, ArrayRef<T> A) { argument
/macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp381 unsigned Op0 = getRegForValue(I->getOperand(0)); local
382 if (Op0 == 0) // Unhandled operand. Halt "fast" selection and bail.
406 unsigned ResultReg = FastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0,
418 ISDOpcode, Op0, Op0IsKill, CF);
436 Op0, Op0IsKill,
749 unsigned Op0 = getRegForValue(I->getOperand(0)); local
750 if (Op0 == 0)
765 ResultReg).addReg(Op0);
772 ISD::BITCAST, Op0, Op0IsKill);
913 const Value *Op0 local
1124 FastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm, MVT ImmType) argument
1173 FastEmitInst_r(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill) argument
1192 FastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) argument
1213 FastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, unsigned Op2, bool Op2IsKill) argument
1237 FastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm) argument
1258 FastEmitInst_rii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm1, uint64_t Imm2) argument
1281 FastEmitInst_rf(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, const ConstantFP *FPImm) argument
1302 FastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm) argument
1326 FastEmitInst_rrii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm1, uint64_t Imm2) argument
1383 FastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, bool Op0IsKill, uint32_t Idx) argument
1399 FastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill) argument
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp192 SDValue Op0, Op1; local
196 if (!SelectADDRrr(Op, Op0, Op1))
197 SelectADDRri(Op, Op0, Op1);
201 OutOps.push_back(Op0);
/macosx-10.9.5/llvmCore-3425.0.33/lib/ExecutionEngine/
H A DExecutionEngine.cpp554 Constant *Op0 = CE->getOperand(0); local
558 GenericValue Result = getConstantValue(Op0);
560 uint64_t Offset = TD->getIndexedOffset(Op0->getType(), Indices);
567 GenericValue GV = getConstantValue(Op0);
573 GenericValue GV = getConstantValue(Op0);
579 GenericValue GV = getConstantValue(Op0);
586 GenericValue GV = getConstantValue(Op0);
592 GenericValue GV = getConstantValue(Op0);
597 GenericValue GV = getConstantValue(Op0);
612 GenericValue GV = getConstantValue(Op0);
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/
H A DX86FloatingPoint.cpp1165 unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2));
1167 bool KillsOp0 = MI->killsRegister(X86::FP0+Op0);
1175 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS?
1180 moveToTop(Op0, I); // Move dead operand to TOS.
1181 TOS = Op0;
1191 duplicateToTop(Op0, Dest, I);
1192 Op0 = TOS = Dest;
1199 duplicateToTop(Op0, Dest, I);
1200 Op0 = TOS = Dest;
1206 assert((TOS == Op0 || TO
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/include/llvm/Analysis/
H A DInstructionSimplify.h90 Value *SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
97 Value *SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact,
104 Value *SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact,
H A DScalarEvolution.h585 const SCEV *getAddExpr(const SCEV *Op0, const SCEV *Op1, const SCEV *Op2, argument
588 Ops.push_back(Op0);
603 const SCEV *getMulExpr(const SCEV *Op0, const SCEV *Op1, const SCEV *Op2, argument
606 Ops.push_back(Op0);
/macosx-10.9.5/llvmCore-3425.0.33/lib/Transforms/Scalar/
H A DCorrelatedValuePropagation.cpp144 Value *Op0 = C->getOperand(0); local
145 if (isa<Instruction>(Op0) &&
146 cast<Instruction>(Op0)->getParent() == C->getParent())
/macosx-10.9.5/llvmCore-3425.0.33/lib/ExecutionEngine/Interpreter/
H A DExecution.cpp1234 GenericValue Op0 = getOperandValue(CE->getOperand(0), SF);
1239 case Instruction::Add: Dest.IntVal = Op0.IntVal + Op1.IntVal; break;
1240 case Instruction::Sub: Dest.IntVal = Op0.IntVal - Op1.IntVal; break;
1241 case Instruction::Mul: Dest.IntVal = Op0.IntVal * Op1.IntVal; break;
1242 case Instruction::FAdd: executeFAddInst(Dest, Op0, Op1, Ty); break;
1243 case Instruction::FSub: executeFSubInst(Dest, Op0, Op1, Ty); break;
1244 case Instruction::FMul: executeFMulInst(Dest, Op0, Op1, Ty); break;
1245 case Instruction::FDiv: executeFDivInst(Dest, Op0, Op1, Ty); break;
1246 case Instruction::FRem: executeFRemInst(Dest, Op0, Op1, Ty); break;
1247 case Instruction::SDiv: Dest.IntVal = Op0
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp1465 bool CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1, DebugLoc &dl,
1543 /// Copy Op0 and Op1 operands into a new array assigned to MI.
1544 static void concatenateMemOperands(MachineInstr *MI, MachineInstr *Op0, argument
1547 size_t numMemRefs = (Op0->memoperands_end() - Op0->memoperands_begin())
1553 std::copy(Op0->memoperands_begin(), Op0->memoperands_end(), MemBegin);
1560 ARMPreAllocLoadStoreOpt::CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1, argument
1573 unsigned Opcode = Op0->getOpcode();
1590 if (!Op0
1722 MachineInstr *Op0 = Ops.back(); local
[all...]
H A DARMFastISel.cpp108 unsigned Op0, bool Op0IsKill);
111 unsigned Op0, bool Op0IsKill,
115 unsigned Op0, bool Op0IsKill,
120 unsigned Op0, bool Op0IsKill,
124 unsigned Op0, bool Op0IsKill,
128 unsigned Op0, bool Op0IsKill,
139 unsigned Op0, bool Op0IsKill,
302 unsigned Op0, bool Op0IsKill) {
308 .addReg(Op0, Op0IsKill * RegState::Kill));
311 .addReg(Op0, Op0IsKil
300 FastEmitInst_r(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill) argument
319 FastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) argument
341 FastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, unsigned Op2, bool Op2IsKill) argument
366 FastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm) argument
388 FastEmitInst_rf(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, const ConstantFP *FPImm) argument
410 FastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm) argument
474 FastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, bool Op0IsKill, uint32_t Idx) argument
1215 Value *Op0 = I->getOperand(0); local
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Hexagon/
H A DHexagonPeephole.cpp224 MachineOperand &Op0 = MI->getOperand(0); local
225 unsigned Reg0 = Op0.getReg();
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp288 SDValue Op0, Op1; local
292 if (!SelectAddr(Op, Op0, Op1))
297 OutOps.push_back(Op0);
/macosx-10.9.5/llvmCore-3425.0.33/lib/VMCore/
H A DAutoUpgrade.cpp271 Value *Op0 = CI->getArgOperand(0); local
292 Rep = Builder.CreateShuffleVector(Op0, Op0, ConstantVector::get(Idxs));
/macosx-10.9.5/llvmCore-3425.0.33/lib/AsmParser/
H A DLLParser.cpp3137 Value *Op0;
3139 if (ParseTypeAndValue(Op0, Loc, PFS)) return true;
3141 if (BasicBlock *BB = dyn_cast<BasicBlock>(Op0)) {
3146 if (Op0->getType() != Type::getInt1Ty(Context))
3155 Inst = BranchInst::Create(Op1, Op2, Op0);
3463 Value *Op0, *Op1, *Op2;
3464 if (ParseTypeAndValue(Op0, Loc, PFS) ||
3471 if (const char *Reason = SelectInst::areInvalidOperands(Op0, Op1, Op2))
3474 Inst = SelectInst::Create(Op0, Op1, Op2);
3500 Value *Op0, *Op
[all...]

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