Searched refs:NextVA (Results 1 - 4 of 4) sorted by relevance
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 410 CCValAssign &VA, CCValAssign &NextVA,
414 SDValue GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA,
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| H A D | ARMFastISel.cpp | 2005 CCValAssign &NextVA = ArgLocs[++i]; local
2007 assert(VA.isRegLoc() && NextVA.isRegLoc() &&
2012 .addReg(NextVA.getLocReg(), RegState::Define)
2015 RegArgs.push_back(NextVA.getLocReg());
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| H A D | ARMISelLowering.cpp | 1268 CCValAssign &VA, CCValAssign &NextVA,
1277 if (NextVA.isRegLoc())
1278 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), fmrrd.getValue(1)));
1280 assert(NextVA.isMemLoc());
1285 dl, DAG, NextVA,
2477 ARMTargetLowering::GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA, argument
2494 if (NextVA.isMemLoc()) {
2496 int FI = MFI->CreateFixedObject(4, NextVA.getLocMemOffset(), true);
2504 Reg = MF.addLiveIn(NextVA.getLocReg(), RC);
1265 PassF64ArgInRegs(DebugLoc dl, SelectionDAG &DAG, SDValue Chain, SDValue &Arg, RegsToPassVector &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, SDValue &StackPtr, SmallVector<SDValue, 8> &MemOpChains, ISD::ArgFlagsTy Flags) const argument
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 190 CCValAssign &NextVA = ArgLocs[++i]; local
193 if (NextVA.isMemLoc()) {
195 CreateFixedObject(4, StackOffset+NextVA.getLocMemOffset(),true);
201 unsigned loReg = MF.addLiveIn(NextVA.getLocReg(),
485 CCValAssign &NextVA = ArgLocs[++i]; local
486 if (NextVA.isRegLoc()) {
487 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Lo));
490 unsigned Offset = NextVA.getLocMemOffset() + StackOffset;
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