Searched refs:FPSCR (Results 1 - 3 of 3) sorted by relevance
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.cpp | 95 Reserved.set(ARM::FPSCR);
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| H A D | ARMISelLowering.cpp | 3493 // The rounding mode is in bits 23:22 of the FPSCR.
3495 // The formula we use to implement this is (((FPSCR + 1 << 22) >> 22) & 3)
3498 SDValue FPSCR = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::i32, local
3501 SDValue FltRounds = DAG.getNode(ISD::ADD, dl, MVT::i32, FPSCR,
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| /macosx-10.9.5/cctools-845/as/ |
| H A D | arm.c | 6087 first_error (_("operand 1 must be FPSCR"));
6131 first_error (_("operand 1 must be FPSCR"));
13834 REGDEF(FPSID,0,VFC), REGDEF(FPSCR,1,VFC), REGDEF(FPEXC,8,VFC),
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